[coreboot-gerrit] Change in coreboot[master]: intel/i945: Delay bridge VGA IO enable to ramstage

[Arthur Heymans (Code Review)]

Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/35676 )

Change subject: intel/i945: Delay bridge VGA IO enable to ramstage
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Patch Set 1: Code-Review+2

So set_vga_bridge_bits() will enable VGA decode on the last external PCI_CLASS_DISPLAY_VGA found? If so this seems like a good change as it looks like multiple PCI bridges could get VGA decode enabled...