build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44578 )
Change subject: mb/supermicro/x11-lga1151v2-series: Add x11sch-l4nf support ......................................................................
Patch Set 1:
(99 comments)
https://review.coreboot.org/c/coreboot/+/44578/1/src/mainboard/supermicro/x1... File src/mainboard/supermicro/x11-lga1151v2-series/variants/x11sch-l4nf/gpio.c:
https://review.coreboot.org/c/coreboot/+/44578/1/src/mainboard/supermicro/x1... PS1, Line 12: _PAD_CFG_STRUCT(GPP_A0, PAD_FUNC(NF3) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE) | (1 << 1), 0), /* ESPI_ALERT1# */ line over 96 characters
https://review.coreboot.org/c/coreboot/+/44578/1/src/mainboard/supermicro/x1... PS1, Line 13: _PAD_CFG_STRUCT(GPP_A1, PAD_FUNC(NF3) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), 0), /* ESPI_IO0 */ line over 96 characters
https://review.coreboot.org/c/coreboot/+/44578/1/src/mainboard/supermicro/x1... PS1, Line 14: _PAD_CFG_STRUCT(GPP_A2, PAD_FUNC(NF3) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE) | (1 << 1), 0), /* ESPI_IO1 */ line over 96 characters
https://review.coreboot.org/c/coreboot/+/44578/1/src/mainboard/supermicro/x1... PS1, Line 15: _PAD_CFG_STRUCT(GPP_A3, PAD_FUNC(NF3) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), 0), /* ESPI_IO2 */ line over 96 characters
https://review.coreboot.org/c/coreboot/+/44578/1/src/mainboard/supermicro/x1... PS1, Line 16: _PAD_CFG_STRUCT(GPP_A4, PAD_FUNC(NF3) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), 0), /* ESPI_IO3 */ line over 96 characters
https://review.coreboot.org/c/coreboot/+/44578/1/src/mainboard/supermicro/x1... PS1, Line 17: _PAD_CFG_STRUCT(GPP_A5, PAD_FUNC(NF3) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), 0), /* ESPI_CS0# */ line over 96 characters
https://review.coreboot.org/c/coreboot/+/44578/1/src/mainboard/supermicro/x1... PS1, Line 18: _PAD_CFG_STRUCT(GPP_A6, PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE) | (1 << 1), 0), /* GPIO */ line over 96 characters
https://review.coreboot.org/c/coreboot/+/44578/1/src/mainboard/supermicro/x1... PS1, Line 19: _PAD_CFG_STRUCT(GPP_A7, PAD_FUNC(NF3) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE) | (1 << 1), 0), /* ESPI_ALERT0# */ line over 96 characters
https://review.coreboot.org/c/coreboot/+/44578/1/src/mainboard/supermicro/x1... PS1, Line 20: _PAD_CFG_STRUCT(GPP_A8, PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE) | (1 << 1), 0), /* CLKRUN# */ line over 96 characters
https://review.coreboot.org/c/coreboot/+/44578/1/src/mainboard/supermicro/x1... PS1, Line 21: _PAD_CFG_STRUCT(GPP_A9, PAD_FUNC(NF3) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), 0), /* ESPI_CLK */ line over 96 characters
https://review.coreboot.org/c/coreboot/+/44578/1/src/mainboard/supermicro/x1... PS1, Line 22: _PAD_CFG_STRUCT(GPP_A10, PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(RX_DISABLE), 0), /* CLKOUT_LPC1 */ line over 96 characters
https://review.coreboot.org/c/coreboot/+/44578/1/src/mainboard/supermicro/x1... PS1, Line 23: _PAD_CFG_STRUCT(GPP_A11, PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE) | (1 << 1), 0), /* GPIO */ line over 96 characters
https://review.coreboot.org/c/coreboot/+/44578/1/src/mainboard/supermicro/x1... PS1, Line 24: _PAD_CFG_STRUCT(GPP_A12, PAD_FUNC(GPIO) | PAD_RESET(PLTRST) | PAD_IRQ_ROUTE(SCI) | PAD_RX_POL(INVERT) | PAD_BUF(TX_DISABLE) | (1 << 1), 0), /* GPIO */ line over 96 characters
https://review.coreboot.org/c/coreboot/+/44578/1/src/mainboard/supermicro/x1... PS1, Line 25: _PAD_CFG_STRUCT(GPP_A13, PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(RX_DISABLE), 0), /* SUSWARN#/SUSPWRDNACK */ line over 96 characters
https://review.coreboot.org/c/coreboot/+/44578/1/src/mainboard/supermicro/x1... PS1, Line 26: _PAD_CFG_STRUCT(GPP_A14, PAD_FUNC(NF3) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), 0), /* ESPI_RESET# */ line over 96 characters
https://review.coreboot.org/c/coreboot/+/44578/1/src/mainboard/supermicro/x1... PS1, Line 27: _PAD_CFG_STRUCT(GPP_A15, PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), 0), /* SUSACK# */ line over 96 characters
https://review.coreboot.org/c/coreboot/+/44578/1/src/mainboard/supermicro/x1... PS1, Line 32: _PAD_CFG_STRUCT(GPP_A20, PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE) | (1 << 1), 0), /* GPIO */ line over 96 characters
https://review.coreboot.org/c/coreboot/+/44578/1/src/mainboard/supermicro/x1... PS1, Line 39: _PAD_CFG_STRUCT(GPP_B1, PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE) | (1 << 1), 0), /* GPIO */ line over 96 characters
https://review.coreboot.org/c/coreboot/+/44578/1/src/mainboard/supermicro/x1... PS1, Line 40: _PAD_CFG_STRUCT(GPP_B2, PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE) | (1 << 1), 0), /* GPIO */ line over 96 characters
https://review.coreboot.org/c/coreboot/+/44578/1/src/mainboard/supermicro/x1... PS1, Line 44: _PAD_CFG_STRUCT(GPP_B6, PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE) | (1 << 1), 0), /* GPIO */ line over 96 characters
https://review.coreboot.org/c/coreboot/+/44578/1/src/mainboard/supermicro/x1... PS1, Line 50: _PAD_CFG_STRUCT(GPP_B12, PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), 0), /* SLP_S0# */ line over 96 characters
https://review.coreboot.org/c/coreboot/+/44578/1/src/mainboard/supermicro/x1... PS1, Line 51: _PAD_CFG_STRUCT(GPP_B13, PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), 0), /* PLTRST# */ line over 96 characters
https://review.coreboot.org/c/coreboot/+/44578/1/src/mainboard/supermicro/x1... PS1, Line 52: _PAD_CFG_STRUCT(GPP_B14, PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), 0), /* SPKR */ line over 96 characters
https://review.coreboot.org/c/coreboot/+/44578/1/src/mainboard/supermicro/x1... PS1, Line 56: _PAD_CFG_STRUCT(GPP_B18, PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE) | (1 << 1), 0), /* GPIO */ line over 96 characters
https://review.coreboot.org/c/coreboot/+/44578/1/src/mainboard/supermicro/x1... PS1, Line 61: _PAD_CFG_STRUCT(GPP_B23, PAD_FUNC(NF2) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), 0), /* PCHHOT# */ line over 96 characters
https://review.coreboot.org/c/coreboot/+/44578/1/src/mainboard/supermicro/x1... PS1, Line 68: _PAD_CFG_STRUCT(GPP_C2, PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE) | (1 << 1), 0), /* GPIO */ line over 96 characters
https://review.coreboot.org/c/coreboot/+/44578/1/src/mainboard/supermicro/x1... PS1, Line 74: _PAD_CFG_STRUCT(GPP_C8, PAD_FUNC(GPIO) | PAD_RESET(PLTRST) | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE) | (1 << 1), 0), /* GPIO */ line over 96 characters
https://review.coreboot.org/c/coreboot/+/44578/1/src/mainboard/supermicro/x1... PS1, Line 80: _PAD_CFG_STRUCT(GPP_C14, PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE) | (1 << 1), 0), /* GPIO */ line over 96 characters
https://review.coreboot.org/c/coreboot/+/44578/1/src/mainboard/supermicro/x1... PS1, Line 82: _PAD_CFG_STRUCT(GPP_C16, PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(RX_DISABLE) | (1 << 1), 0), /* I2C0_SDA */ line over 96 characters
https://review.coreboot.org/c/coreboot/+/44578/1/src/mainboard/supermicro/x1... PS1, Line 83: _PAD_CFG_STRUCT(GPP_C17, PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(RX_DISABLE) | (1 << 1), 0), /* I2C0_SCL */ line over 96 characters
https://review.coreboot.org/c/coreboot/+/44578/1/src/mainboard/supermicro/x1... PS1, Line 84: _PAD_CFG_STRUCT(GPP_C18, PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(RX_DISABLE) | (1 << 1), 0), /* I2C1_SDA */ line over 96 characters
https://review.coreboot.org/c/coreboot/+/44578/1/src/mainboard/supermicro/x1... PS1, Line 85: _PAD_CFG_STRUCT(GPP_C19, PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(RX_DISABLE) | (1 << 1), 0), /* I2C1_SCL */ line over 96 characters
https://review.coreboot.org/c/coreboot/+/44578/1/src/mainboard/supermicro/x1... PS1, Line 88: _PAD_CFG_STRUCT(GPP_C22, PAD_FUNC(GPIO) | PAD_RESET(PLTRST) | PAD_TRIG(EDGE_SINGLE) | PAD_IRQ_ROUTE(SMI) | PAD_RX_POL(INVERT) | PAD_BUF(TX_DISABLE) | (1 << 1), 0), /* GPIO */ line over 96 characters
https://review.coreboot.org/c/coreboot/+/44578/1/src/mainboard/supermicro/x1... PS1, Line 89: _PAD_CFG_STRUCT(GPP_C23, PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE) | (1 << 1), 0), /* GPIO */ line over 96 characters
https://review.coreboot.org/c/coreboot/+/44578/1/src/mainboard/supermicro/x1... PS1, Line 92: _PAD_CFG_STRUCT(GPP_D0, PAD_FUNC(GPIO) | PAD_RESET(PLTRST) | PAD_TRIG(EDGE_SINGLE) | PAD_IRQ_ROUTE(NMI) | PAD_RX_POL(INVERT) | PAD_BUF(TX_DISABLE) | (1 << 1), 0), /* GPIO */ line over 96 characters
https://review.coreboot.org/c/coreboot/+/44578/1/src/mainboard/supermicro/x1... PS1, Line 95: _PAD_CFG_STRUCT(GPP_D3, PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE) | (1 << 1), 0), /* GPIO */ line over 96 characters
https://review.coreboot.org/c/coreboot/+/44578/1/src/mainboard/supermicro/x1... PS1, Line 96: _PAD_CFG_STRUCT(GPP_D4, PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE) | (1 << 1), 0), /* GPIO */ line over 96 characters
https://review.coreboot.org/c/coreboot/+/44578/1/src/mainboard/supermicro/x1... PS1, Line 137: _PAD_CFG_STRUCT(GPD1, PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE) | (1 << 1), 0), /* ACPRESENT */ line over 96 characters
https://review.coreboot.org/c/coreboot/+/44578/1/src/mainboard/supermicro/x1... PS1, Line 138: _PAD_CFG_STRUCT(GPD2, PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE) | (1 << 1), 0), /* LAN_WAKE# */ line over 96 characters
https://review.coreboot.org/c/coreboot/+/44578/1/src/mainboard/supermicro/x1... PS1, Line 139: _PAD_CFG_STRUCT(GPD3, PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE) | (1 << 1), 0), /* PRWBTN# */ line over 96 characters
https://review.coreboot.org/c/coreboot/+/44578/1/src/mainboard/supermicro/x1... PS1, Line 140: _PAD_CFG_STRUCT(GPD4, PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), 0), /* SLP_S3# */ line over 96 characters
https://review.coreboot.org/c/coreboot/+/44578/1/src/mainboard/supermicro/x1... PS1, Line 141: _PAD_CFG_STRUCT(GPD5, PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), 0), /* SLP_S4# */ line over 96 characters
https://review.coreboot.org/c/coreboot/+/44578/1/src/mainboard/supermicro/x1... PS1, Line 142: _PAD_CFG_STRUCT(GPD6, PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(RX_DISABLE), 0), /* SLP_A# */ line over 96 characters
https://review.coreboot.org/c/coreboot/+/44578/1/src/mainboard/supermicro/x1... PS1, Line 143: _PAD_CFG_STRUCT(GPD7, PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE) | (1 << 1), 0), /* GPIO */ line over 96 characters
https://review.coreboot.org/c/coreboot/+/44578/1/src/mainboard/supermicro/x1... PS1, Line 144: _PAD_CFG_STRUCT(GPD8, PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), 0), /* SUSCLK */ line over 96 characters
https://review.coreboot.org/c/coreboot/+/44578/1/src/mainboard/supermicro/x1... PS1, Line 146: _PAD_CFG_STRUCT(GPD10, PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), 0), /* SLP_S5# */ line over 96 characters
https://review.coreboot.org/c/coreboot/+/44578/1/src/mainboard/supermicro/x1... PS1, Line 152: _PAD_CFG_STRUCT(GPP_K0, PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE) | (1 << 1), 0), /* GPIO */ line over 96 characters
https://review.coreboot.org/c/coreboot/+/44578/1/src/mainboard/supermicro/x1... PS1, Line 153: _PAD_CFG_STRUCT(GPP_K1, PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE) | (1 << 1), 0), /* GPIO */ line over 96 characters
https://review.coreboot.org/c/coreboot/+/44578/1/src/mainboard/supermicro/x1... PS1, Line 154: _PAD_CFG_STRUCT(GPP_K2, PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE) | (1 << 1), 0), /* GPIO */ line over 96 characters
https://review.coreboot.org/c/coreboot/+/44578/1/src/mainboard/supermicro/x1... PS1, Line 155: _PAD_CFG_STRUCT(GPP_K3, PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE) | (1 << 1), 0), /* GPIO */ line over 96 characters
https://review.coreboot.org/c/coreboot/+/44578/1/src/mainboard/supermicro/x1... PS1, Line 164: _PAD_CFG_STRUCT(GPP_K12, PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE) | (1 << 1), 0), /* GPIO */ line over 96 characters
https://review.coreboot.org/c/coreboot/+/44578/1/src/mainboard/supermicro/x1... PS1, Line 169: _PAD_CFG_STRUCT(GPP_K17, PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE) | (1 << 1), 0), /* GPIO */ line over 96 characters
https://review.coreboot.org/c/coreboot/+/44578/1/src/mainboard/supermicro/x1... PS1, Line 171: _PAD_CFG_STRUCT(GPP_K19, PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), 0), /* SMI# */ line over 96 characters
https://review.coreboot.org/c/coreboot/+/44578/1/src/mainboard/supermicro/x1... PS1, Line 174: _PAD_CFG_STRUCT(GPP_K22, PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE) | (1 << 1), 0), /* GPIO */ line over 96 characters
https://review.coreboot.org/c/coreboot/+/44578/1/src/mainboard/supermicro/x1... PS1, Line 175: _PAD_CFG_STRUCT(GPP_K23, PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE) | (1 << 1), 0), /* GPIO */ line over 96 characters
https://review.coreboot.org/c/coreboot/+/44578/1/src/mainboard/supermicro/x1... PS1, Line 180: _PAD_CFG_STRUCT(GPP_H2, PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE) | (1 << 1), 0), /* GPIO */ line over 96 characters
https://review.coreboot.org/c/coreboot/+/44578/1/src/mainboard/supermicro/x1... PS1, Line 193: _PAD_CFG_STRUCT(GPP_H15, PAD_FUNC(GPIO) | PAD_RESET(PLTRST) | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE) | (1 << 1), 0), /* GPIO */ line over 96 characters
https://review.coreboot.org/c/coreboot/+/44578/1/src/mainboard/supermicro/x1... PS1, Line 196: _PAD_CFG_STRUCT(GPP_H18, PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE) | (1 << 1), 0), /* GPIO */ line over 96 characters
https://review.coreboot.org/c/coreboot/+/44578/1/src/mainboard/supermicro/x1... PS1, Line 205: _PAD_CFG_STRUCT(GPP_E1, PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE) | (1 << 1), 0), /* SATAXPCIE1 */ line over 96 characters
https://review.coreboot.org/c/coreboot/+/44578/1/src/mainboard/supermicro/x1... PS1, Line 207: _PAD_CFG_STRUCT(GPP_E3, PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE) | (1 << 1), 0), /* GPIO */ line over 96 characters
https://review.coreboot.org/c/coreboot/+/44578/1/src/mainboard/supermicro/x1... PS1, Line 209: _PAD_CFG_STRUCT(GPP_E5, PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE) | (1 << 1), 0), /* GPIO */ line over 96 characters
https://review.coreboot.org/c/coreboot/+/44578/1/src/mainboard/supermicro/x1... PS1, Line 210: _PAD_CFG_STRUCT(GPP_E6, PAD_FUNC(GPIO) | PAD_RESET(PLTRST) | PAD_TRIG(EDGE_SINGLE) | PAD_IRQ_ROUTE(NMI) | PAD_RX_POL(INVERT) | PAD_BUF(TX_DISABLE) | (1 << 1), 0), /* GPIO */ line over 96 characters
https://review.coreboot.org/c/coreboot/+/44578/1/src/mainboard/supermicro/x1... PS1, Line 212: _PAD_CFG_STRUCT(GPP_E8, PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), 0), /* SATALED# */ line over 96 characters
https://review.coreboot.org/c/coreboot/+/44578/1/src/mainboard/supermicro/x1... PS1, Line 213: _PAD_CFG_STRUCT(GPP_E9, PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE) | (1 << 1), 0), /* USB2_OC0# */ line over 96 characters
https://review.coreboot.org/c/coreboot/+/44578/1/src/mainboard/supermicro/x1... PS1, Line 214: _PAD_CFG_STRUCT(GPP_E10, PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE) | (1 << 1), 0), /* USB2_OC1# */ line over 96 characters
https://review.coreboot.org/c/coreboot/+/44578/1/src/mainboard/supermicro/x1... PS1, Line 215: _PAD_CFG_STRUCT(GPP_E11, PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE) | (1 << 1), 0), /* USB2_OC2# */ line over 96 characters
https://review.coreboot.org/c/coreboot/+/44578/1/src/mainboard/supermicro/x1... PS1, Line 216: _PAD_CFG_STRUCT(GPP_E12, PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE) | (1 << 1), 0), /* USB2_OC3# */ line over 96 characters
https://review.coreboot.org/c/coreboot/+/44578/1/src/mainboard/supermicro/x1... PS1, Line 224: _PAD_CFG_STRUCT(GPP_F5, PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE) | (1 << 1), 0), /* GPIO */ line over 96 characters
https://review.coreboot.org/c/coreboot/+/44578/1/src/mainboard/supermicro/x1... PS1, Line 226: _PAD_CFG_STRUCT(GPP_F7, PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE) | (1 << 1), 0), /* GPIO */ line over 96 characters
https://review.coreboot.org/c/coreboot/+/44578/1/src/mainboard/supermicro/x1... PS1, Line 227: _PAD_CFG_STRUCT(GPP_F8, PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE) | (1 << 1), 0), /* GPIO */ line over 96 characters
https://review.coreboot.org/c/coreboot/+/44578/1/src/mainboard/supermicro/x1... PS1, Line 228: _PAD_CFG_STRUCT(GPP_F9, PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE) | (1 << 1), 0), /* GPIO */ line over 96 characters
https://review.coreboot.org/c/coreboot/+/44578/1/src/mainboard/supermicro/x1... PS1, Line 229: _PAD_CFG_STRUCT(GPP_F10, PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), 0), /* SATA_SCLOCK */ line over 96 characters
https://review.coreboot.org/c/coreboot/+/44578/1/src/mainboard/supermicro/x1... PS1, Line 230: _PAD_CFG_STRUCT(GPP_F11, PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), 0), /* SATA_SLOAD */ line over 96 characters
https://review.coreboot.org/c/coreboot/+/44578/1/src/mainboard/supermicro/x1... PS1, Line 231: _PAD_CFG_STRUCT(GPP_F12, PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), 0), /* SATA_SDATAOUT1 */ line over 96 characters
https://review.coreboot.org/c/coreboot/+/44578/1/src/mainboard/supermicro/x1... PS1, Line 232: _PAD_CFG_STRUCT(GPP_F13, PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), 0), /* SATA_SDATAOUT0 */ line over 96 characters
https://review.coreboot.org/c/coreboot/+/44578/1/src/mainboard/supermicro/x1... PS1, Line 234: _PAD_CFG_STRUCT(GPP_F15, PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE) | (1 << 1), 0), /* USB2_OC4# */ line over 96 characters
https://review.coreboot.org/c/coreboot/+/44578/1/src/mainboard/supermicro/x1... PS1, Line 235: _PAD_CFG_STRUCT(GPP_F16, PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE) | (1 << 1), 0), /* USB2_OC5# */ line over 96 characters
https://review.coreboot.org/c/coreboot/+/44578/1/src/mainboard/supermicro/x1... PS1, Line 249: _PAD_CFG_STRUCT(GPP_I0, PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_BUF(TX_RX_DISABLE), PAD_PULL(NATIVE)), /* DDPB_HPD0 */ line over 96 characters
https://review.coreboot.org/c/coreboot/+/44578/1/src/mainboard/supermicro/x1... PS1, Line 250: _PAD_CFG_STRUCT(GPP_I1, PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_BUF(TX_RX_DISABLE), PAD_PULL(NATIVE)), /* DDPB_HPD1 */ line over 96 characters
https://review.coreboot.org/c/coreboot/+/44578/1/src/mainboard/supermicro/x1... PS1, Line 251: _PAD_CFG_STRUCT(GPP_I2, PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_BUF(TX_RX_DISABLE), PAD_PULL(NATIVE)), /* DDPB_HPD2 */ line over 96 characters
https://review.coreboot.org/c/coreboot/+/44578/1/src/mainboard/supermicro/x1... PS1, Line 252: _PAD_CFG_STRUCT(GPP_I3, PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_BUF(TX_RX_DISABLE), 0), /* DDPB_HPD3 */ line over 96 characters
https://review.coreboot.org/c/coreboot/+/44578/1/src/mainboard/supermicro/x1... PS1, Line 253: _PAD_CFG_STRUCT(GPP_I4, PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_BUF(TX_RX_DISABLE), 0), /* EDP_HPD */ line over 96 characters
https://review.coreboot.org/c/coreboot/+/44578/1/src/mainboard/supermicro/x1... PS1, Line 254: _PAD_CFG_STRUCT(GPP_I5, PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_BUF(TX_RX_DISABLE), 0), /* DDPB_CTRLCLK */ line over 96 characters
https://review.coreboot.org/c/coreboot/+/44578/1/src/mainboard/supermicro/x1... PS1, Line 255: _PAD_CFG_STRUCT(GPP_I6, PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_BUF(TX_RX_DISABLE) | (1 << 1), 0), /* DDPB_CTRLDATA */ line over 96 characters
https://review.coreboot.org/c/coreboot/+/44578/1/src/mainboard/supermicro/x1... PS1, Line 256: _PAD_CFG_STRUCT(GPP_I7, PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_BUF(TX_RX_DISABLE), 0), /* DDPC_CTRLCLK */ line over 96 characters
https://review.coreboot.org/c/coreboot/+/44578/1/src/mainboard/supermicro/x1... PS1, Line 257: _PAD_CFG_STRUCT(GPP_I8, PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_BUF(TX_RX_DISABLE), 0), /* DDPC_CTRLDATA */ line over 96 characters
https://review.coreboot.org/c/coreboot/+/44578/1/src/mainboard/supermicro/x1... PS1, Line 258: _PAD_CFG_STRUCT(GPP_I9, PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_BUF(TX_RX_DISABLE), PAD_PULL(20K_PD)), /* DDPD_CTRLCLK */ line over 96 characters
https://review.coreboot.org/c/coreboot/+/44578/1/src/mainboard/supermicro/x1... PS1, Line 259: _PAD_CFG_STRUCT(GPP_I10, PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_BUF(TX_RX_DISABLE), PAD_PULL(20K_PD)), /* DDPD_CTRLDATA */ line over 96 characters
https://review.coreboot.org/c/coreboot/+/44578/1/src/mainboard/supermicro/x1... PS1, Line 260: _PAD_CFG_STRUCT(GPP_I11, PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_BUF(TX_RX_DISABLE), PAD_PULL(NATIVE)), /* M2_SKT2_CFG0 */ line over 96 characters
https://review.coreboot.org/c/coreboot/+/44578/1/src/mainboard/supermicro/x1... PS1, Line 261: _PAD_CFG_STRUCT(GPP_I12, PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_BUF(TX_RX_DISABLE), PAD_PULL(NATIVE)), /* M2_SKT2_CFG1 */ line over 96 characters
https://review.coreboot.org/c/coreboot/+/44578/1/src/mainboard/supermicro/x1... PS1, Line 262: _PAD_CFG_STRUCT(GPP_I13, PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_BUF(TX_RX_DISABLE), PAD_PULL(NATIVE)), /* M2_SKT2_CFG2 */ line over 96 characters
https://review.coreboot.org/c/coreboot/+/44578/1/src/mainboard/supermicro/x1... PS1, Line 263: _PAD_CFG_STRUCT(GPP_I14, PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_BUF(TX_RX_DISABLE) | (1 << 1), PAD_PULL(NATIVE)), /* M2_SKT2_CFG3 */ line over 96 characters
https://review.coreboot.org/c/coreboot/+/44578/1/src/mainboard/supermicro/x1... PS1, Line 266: _PAD_CFG_STRUCT(GPP_J0, PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_BUF(TX_RX_DISABLE), PAD_PULL(NATIVE)), /* CNV_PA_BLANKING */ line over 96 characters
https://review.coreboot.org/c/coreboot/+/44578/1/src/mainboard/supermicro/x1... PS1, Line 267: _PAD_CFG_STRUCT(GPP_J1, PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_BUF(TX_RX_DISABLE), PAD_PULL(NATIVE)), /* n/a */ line over 96 characters
https://review.coreboot.org/c/coreboot/+/44578/1/src/mainboard/supermicro/x1... PS1, Line 268: _PAD_CFG_STRUCT(GPP_J2, PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), 0), /* n/a */ line over 96 characters
https://review.coreboot.org/c/coreboot/+/44578/1/src/mainboard/supermicro/x1... PS1, Line 269: _PAD_CFG_STRUCT(GPP_J3, PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), 0), /* n/a */ line over 96 characters
https://review.coreboot.org/c/coreboot/+/44578/1/src/mainboard/supermicro/x1... PS1, Line 275: _PAD_CFG_STRUCT(GPP_J9, PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE) | (1 << 1), 0), /* GPIO */ line over 96 characters
https://review.coreboot.org/c/coreboot/+/44578/1/src/mainboard/supermicro/x1... PS1, Line 276: _PAD_CFG_STRUCT(GPP_J10, PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE) | (1 << 1), 0), /* GPIO */ line over 96 characters
https://review.coreboot.org/c/coreboot/+/44578/1/src/mainboard/supermicro/x1... PS1, Line 277: _PAD_CFG_STRUCT(GPP_J11, PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE) | (1 << 1), 0), /* GPIO */ line over 96 characters