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Shuo Liu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/81316?usp=email )
Change subject: soc/intel/xeon_sp: Add Granite Rapids initial codes
......................................................................
Patch Set 34:
(1 comment)
File src/soc/intel/xeon_sp/gnr/acpi/platform.asl:
https://review.coreboot.org/c/coreboot/+/81316/comment/4e831b2c_a33eccd3 :
PS33, Line 6: Name (_S0, Package () // mandatory system state
: {
: 0x00, 0x00, 0x00, 0x00
: })
:
: Name (_S5, Package () // mandatory system state
: {
: 0x07, 0x00, 0x00, 0x00
: })
It is possible, but I need to modify the […]
diff --git a/src/southbridge/intel/common/acpi/sleepstates.asl b/src/southbridge/intel/common/acpi/sleepstates.asl
index 14ed86e91e4..51475d8d89e 100644
--- a/src/southbridge/intel/common/acpi/sleepstates.asl
+++ b/src/southbridge/intel/common/acpi/sleepstates.asl
@@ -1,11 +1,15 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/* S1 support: bit 0, S2 Support: bit 1, etc. S0 & S5 assumed */
+#if CONFIG(XEON_SP_COMMON_BASE)
+Name (SSFG, 0x00)
+#else
#if CONFIG(HAVE_ACPI_RESUME)
Name (SSFG, 0x0D)
#else
Name (SSFG, 0x09)
#endif
+#endif
If (CONFIG(ACPI_S1_NOT_SUPPORTED)) {
SSFG &= 0xfe
I will add this after https://review.coreboot.org/c/coreboot/+/81319
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