Kyösti Mälkki has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/37487 )
Change subject: program.ld: Qualify .bss linking with ENV_EARLY_RAM ......................................................................
Patch Set 2:
(1 comment)
https://review.coreboot.org/c/coreboot/+/37487/1//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/37487/1//COMMIT_MSG@10 PS1, Line 10: location across early stages, and not necessarily within the
a) Agree. […]
First, I guess there is some chance of current work getting approved, while it is not optimal it is not that intrusive or bad either.
I have not yet abandoned the idea of storing romstage as an rmodule and have it relocated somewhere high in between CBMEM and TSEG.
Discuss your options about S3 resume path early with ChromeOS security team. If Secure Process does not load bootblock and romstage from SPI and also uses a separate resume vector (I remember something like that from MullinsPI and StoneyPI), that resume vector possibly has to come from (""secure"") stage cache inside TSEG.