[coreboot-gerrit] Change in coreboot[master]: mb/google/hatch: Add noise mitigation setting for dratini/jinlon

[Tim Wawrzynczak (Code Review)]

Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/38212 )

Change subject: mb/google/hatch: Add noise mitigation setting for dratini/jinlon
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Patch Set 5:

(3 comments)

https://review.coreboot.org/c/coreboot/+/38212/3//COMMIT_MSG 
Commit Message:

https://review.coreboot.org/c/coreboot/+/38212/3//COMMIT_MSG@9 
PS3, Line 9: mitgation
> The SW option is provided in intel doc 575216 and the same solution is applied on hatch board. […]

Ack

https://review.coreboot.org/c/coreboot/+/38212/3//COMMIT_MSG@14 
PS3, Line 14: TEST=build and verify that noise reduce.
> There is test report with HW/SW solution on issue tracker. […]

This is the recommended step by Intel. Any higher and the slew rates have much greater impact on the latencies mentioned elsewhere on this issue. Also doing some cap swapping on one of the rails to mitigate noise.

https://review.coreboot.org/c/coreboot/+/38212/4//COMMIT_MSG 
Commit Message:

https://review.coreboot.org/c/coreboot/+/38212/4//COMMIT_MSG@9 
PS4, Line 9: dived
> divided?

Done