Michael Niewöhner has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/35426 )
Change subject: mb/supermicro: convert x11ssh to variants-capable tree structure ......................................................................
mb/supermicro: convert x11ssh to variants-capable tree structure
Change-Id: I8dc4240ae042760a845e890b923ad40478bb8e29 Signed-off-by: Michael Niewöhner foss@mniewoehner.de --- M Documentation/mainboard/index.md R Documentation/mainboard/supermicro/x11/ssh-tf/x11ssh-tf.md R Documentation/mainboard/supermicro/x11/ssh-tf/x11ssh_flash.jpg R src/mainboard/supermicro/x11/Kconfig A src/mainboard/supermicro/x11/Kconfig.name R src/mainboard/supermicro/x11/Makefile.inc R src/mainboard/supermicro/x11/acpi/ec.asl R src/mainboard/supermicro/x11/acpi/mainboard.asl R src/mainboard/supermicro/x11/acpi/superio.asl R src/mainboard/supermicro/x11/acpi_tables.c R src/mainboard/supermicro/x11/bootblock.c R src/mainboard/supermicro/x11/cmos.layout R src/mainboard/supermicro/x11/devicetree.cb R src/mainboard/supermicro/x11/dsdt.asl R src/mainboard/supermicro/x11/ramstage.c R src/mainboard/supermicro/x11/romstage.c A src/mainboard/supermicro/x11/variants/ssh-tf/Kconfig A src/mainboard/supermicro/x11/variants/ssh-tf/Kconfig.name R src/mainboard/supermicro/x11/variants/ssh-tf/board_info.txt A src/mainboard/supermicro/x11/variants/ssh-tf/devicetree.cb R src/mainboard/supermicro/x11/variants/ssh-tf/include/variant/gpio.h R src/mainboard/supermicro/x11/vboot-ro-rwab.fmd D src/mainboard/supermicro/x11ssh/Kconfig.name D src/mainboard/supermicro/x11ssh/board_info.txt 24 files changed, 164 insertions(+), 148 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/26/35426/1
diff --git a/Documentation/mainboard/index.md b/Documentation/mainboard/index.md index 08689b7..62d8dd3 100644 --- a/Documentation/mainboard/index.md +++ b/Documentation/mainboard/index.md @@ -111,7 +111,7 @@ ## Supermicro
- [X10SLM+-F](supermicro/x10slm-f.md) -- [X11SSH-TF](supermicro/x11ssh-tf.md) +- [X11SSH-TF](supermicro/x11/ssh-tf/x11ssh-tf.md)
## UP
diff --git a/Documentation/mainboard/supermicro/x11ssh-tf.md b/Documentation/mainboard/supermicro/x11/ssh-tf/x11ssh-tf.md similarity index 100% rename from Documentation/mainboard/supermicro/x11ssh-tf.md rename to Documentation/mainboard/supermicro/x11/ssh-tf/x11ssh-tf.md diff --git a/Documentation/mainboard/supermicro/x11ssh_flash.jpg b/Documentation/mainboard/supermicro/x11/ssh-tf/x11ssh_flash.jpg similarity index 100% rename from Documentation/mainboard/supermicro/x11ssh_flash.jpg rename to Documentation/mainboard/supermicro/x11/ssh-tf/x11ssh_flash.jpg Binary files differ diff --git a/src/mainboard/supermicro/x11ssh/Kconfig b/src/mainboard/supermicro/x11/Kconfig similarity index 74% rename from src/mainboard/supermicro/x11ssh/Kconfig rename to src/mainboard/supermicro/x11/Kconfig index 4f18a80..98e1125 100644 --- a/src/mainboard/supermicro/x11ssh/Kconfig +++ b/src/mainboard/supermicro/x11/Kconfig @@ -1,5 +1,7 @@ -config BOARD_SUPERMICRO_BASEBOARD_X11SSH - def_bool n +if BOARD_SUPERMICRO_X11SSH_TF + +config BOARD_SPECIFIC_OPTIONS + def_bool y select BOARD_ROMSIZE_KB_16384 select HAVE_ACPI_RESUME select HAVE_ACPI_TABLES @@ -12,7 +14,17 @@ select GENERATE_SMBIOS_TABLES select IPMI_KCS
-if BOARD_SUPERMICRO_BASEBOARD_X11SSH +config MAINBOARD_DIR + string + default "supermicro/x11" + +config OVERRIDE_DEVICETREE + string + default "variants/$(CONFIG_VARIANT_DIR)/devicetree.cb" + +config MAINBOARD_FAMILY + string + default "Supermicro_X11"
config VBOOT select VBOOT_NO_BOARD_SUPPORT @@ -28,34 +40,18 @@ hex default 0x2a
+config CBFS_SIZE + hex + default 0xb00000 if VBOOT + config FMDFILE string default "src/mainboard/$(CONFIG_MAINBOARD_DIR)/vboot-ro-rwab.fmd" if VBOOT_SLOTS_RW_AB
-config CBFS_SIZE - hex - default 0x009aa000 if !VBOOT - config IRQ_SLOT_COUNT int default 18
-config MAINBOARD_DIR - string - default "supermicro/x11ssh" - -config VARIANT_DIR - string - default "tf" if BOARD_SUPERMICRO_X11SSH_PLUS_TF - -config DEVICETREE - string - default "variants/$(CONFIG_VARIANT_DIR)/devicetree.cb" - -config MAINBOARD_PART_NUMBER - string - default "X11SSH-TF" if BOARD_SUPERMICRO_X11SSH_PLUS_TF - config MAX_CPUS int default 8 @@ -76,4 +72,6 @@ int default 512
-endif # BOARD_SUPERMICRO_BASEBOARD_X11SSH +source "src/mainboard/supermicro/x11/variants/*/Kconfig" + +endif # BOARD_SUPERMICRO_X11SSH_TF diff --git a/src/mainboard/supermicro/x11/Kconfig.name b/src/mainboard/supermicro/x11/Kconfig.name new file mode 100644 index 0000000..ec23e7d --- /dev/null +++ b/src/mainboard/supermicro/x11/Kconfig.name @@ -0,0 +1 @@ +source "src/mainboard/supermicro/x11/variants/*/Kconfig.name" diff --git a/src/mainboard/supermicro/x11ssh/Makefile.inc b/src/mainboard/supermicro/x11/Makefile.inc similarity index 100% rename from src/mainboard/supermicro/x11ssh/Makefile.inc rename to src/mainboard/supermicro/x11/Makefile.inc diff --git a/src/mainboard/supermicro/x11ssh/acpi/ec.asl b/src/mainboard/supermicro/x11/acpi/ec.asl similarity index 100% rename from src/mainboard/supermicro/x11ssh/acpi/ec.asl rename to src/mainboard/supermicro/x11/acpi/ec.asl diff --git a/src/mainboard/supermicro/x11ssh/acpi/mainboard.asl b/src/mainboard/supermicro/x11/acpi/mainboard.asl similarity index 100% rename from src/mainboard/supermicro/x11ssh/acpi/mainboard.asl rename to src/mainboard/supermicro/x11/acpi/mainboard.asl diff --git a/src/mainboard/supermicro/x11ssh/acpi/superio.asl b/src/mainboard/supermicro/x11/acpi/superio.asl similarity index 100% rename from src/mainboard/supermicro/x11ssh/acpi/superio.asl rename to src/mainboard/supermicro/x11/acpi/superio.asl diff --git a/src/mainboard/supermicro/x11ssh/acpi_tables.c b/src/mainboard/supermicro/x11/acpi_tables.c similarity index 100% rename from src/mainboard/supermicro/x11ssh/acpi_tables.c rename to src/mainboard/supermicro/x11/acpi_tables.c diff --git a/src/mainboard/supermicro/x11ssh/bootblock.c b/src/mainboard/supermicro/x11/bootblock.c similarity index 97% rename from src/mainboard/supermicro/x11ssh/bootblock.c rename to src/mainboard/supermicro/x11/bootblock.c index 8bc8ab0..27653f5 100644 --- a/src/mainboard/supermicro/x11ssh/bootblock.c +++ b/src/mainboard/supermicro/x11/bootblock.c @@ -15,7 +15,7 @@
#include <bootblock_common.h> #include <soc/gpio.h> -#include "gpio.h" +#include <variant/gpio.h> #include <superio/aspeed/common/aspeed.h> #include <superio/aspeed/ast2400/ast2400.h> #include <delay.h> diff --git a/src/mainboard/supermicro/x11ssh/cmos.layout b/src/mainboard/supermicro/x11/cmos.layout similarity index 100% rename from src/mainboard/supermicro/x11ssh/cmos.layout rename to src/mainboard/supermicro/x11/cmos.layout diff --git a/src/mainboard/supermicro/x11ssh/variants/tf/devicetree.cb b/src/mainboard/supermicro/x11/devicetree.cb similarity index 60% rename from src/mainboard/supermicro/x11ssh/variants/tf/devicetree.cb rename to src/mainboard/supermicro/x11/devicetree.cb index ce6bfa5..ea4f7a1 100644 --- a/src/mainboard/supermicro/x11ssh/variants/tf/devicetree.cb +++ b/src/mainboard/supermicro/x11/devicetree.cb @@ -5,19 +5,6 @@ register "deep_s5_enable_dc" = "0" register "deep_sx_config" = "DSX_EN_LAN_WAKE_PIN"
- # GPE configuration - # Note that GPE events called out in ASL code rely on this - # route. i.e. If this route changes then the affected GPE - # offset bits also need to be changed. - register "gpe0_dw0" = "GPP_B" - register "gpe0_dw1" = "GPP_D" - register "gpe0_dw2" = "GPP_E" - - register "gen1_dec" = "0x007c0a01" # Super IO SWC - register "gen2_dec" = "0x000c0ca1" # IPMI KCS - register "gen3_dec" = "0x000c03e1" # UART3 - register "gen4_dec" = "0x000c02e1" # UART4 - # Enable "Intel Speed Shift Technology" register "speed_shift_enable" = "1"
@@ -102,23 +89,6 @@ # LPC register "serirq_mode" = "SERIRQ_CONTINUOUS"
- # PCIe configuration - # Enable JPCIE1 - register "PcieRpEnable[0]" = "1" - register "PcieRpClkReqSupport[0]" = "0" - - # Enable ASpeed PCI bridge - register "PcieRpEnable[2]" = "1" - register "PcieRpClkReqSupport[2]" = "0" - - # Enable X550T (10GbE) - register "PcieRpEnable[4]" = "1" - register "PcieRpClkReqSupport[4]" = "0" - - # Enable M.2 - register "PcieRpEnable[8]" = "1" - register "PcieRpClkReqSupport[8]" = "0" - # Enabling SLP_S3#, SLP_S4#, SLP_SUS and SLP_A Stretch # SLP_S3 Minimum Assertion Width. Values 0: 60us, 1: 1ms, 2: 50ms, 3: 2s register "PmConfigSlpS3MinAssert" = "0x02" @@ -201,90 +171,25 @@ device lapic 0 on end end device domain 0 on - device pci 00.0 on end # Host Bridge - device pci 01.0 on end # unused - device pci 01.1 on - smbios_slot_desc "SlotTypePciExpressGen3X8" "SlotLengthShort" "CPU SLOT6 PCI-E 3.0 X8" "SlotDataBusWidth4X" - end # PCIE Slot (JPCIE1) - device pci 04.0 on end # SA thermal subsystem - device pci 14.0 on end # USB xHCI - device pci 14.1 off end # USB xDCI (OTG) - device pci 14.2 on end # Thermal Subsystem - device pci 16.0 on end # Management Engine Interface 1 - device pci 16.1 on end # Management Engine Interface 2 - device pci 17.0 on end # SATA - device pci 1c.0 on - smbios_slot_desc "SlotTypePciExpressGen3X4" "SlotLengthLong" "PCH SLOT4 PCI-E 3.0 X2(IN X4)" "SlotDataBusWidth2X" - end # PCI Express Port 1 (Slot JPCIE1) - device pci 1c.2 on - device pci 00.0 on - device pci 00.0 on end # Aspeed 2400 VGA - end - end # PCI Express Port 3 - device pci 1c.4 on - device pci 00.0 on end # 10GbE - device pci 00.1 on end # 10GbE - end # PCI Express Port 5 - device pci 1d.0 on - smbios_slot_desc "SlotTypeM2Socket3" "SlotLengthOther" "M.2 2280" "SlotDataBusWidth4X" - end # PCI Express Port 9 - device pci 1f.0 on - chip drivers/ipmi - # On cold boot it takes a while for the BMC to start the IPMI service - register "wait_for_bmc" = "1" - register "bmc_boot_timeout" = "60" - device pnp ca2.0 on end # IPMI KCS - end + device pci 00.0 on end # Host Bridge + device pci 04.0 on end # SA thermal subsystem + device pci 14.0 on end # USB xHCI + device pci 14.1 off end # USB xDCI (OTG) + device pci 14.2 on end # Thermal Subsystem + device pci 16.0 on end # Management Engine Interface 1 + device pci 16.1 on end # Management Engine Interface 2 + device pci 17.0 on end # SATA + device pci 1f.0 on # LPC Interface chip superio/common - device pnp 2e.0 on - chip superio/aspeed/ast2400 - device pnp 2e.2 on # SUART1 - io 0x60 = 0x3f8 - irq 0x70 = 4 - end - device pnp 2e.3 on # SUART2 - io 0x60 = 0x2f8 - irq 0x70 = 3 - end - device pnp 2e.4 on # SWC - io 0x60 = 0xa00 - io 0x62 = 0xa10 - io 0x64 = 0xa20 - io 0x66 = 0xa30 - irq 0x70 = 0xb - end - device pnp 2e.5 on # Keyboard - io 0x60 = 0x60 - io 0x62 = 0x64 - irq 0x70 = 1 - irq 0x72 = 0xc - end - device pnp 2e.7 on # GPIO - end - device pnp 2e.b on # SUART3 - io 0x60 = 0x3e8 - irq 0x70 = 4 - end - device pnp 2e.c on # SUART4 - io 0x60 = 0x2e8 - irq 0x70 = 3 - end - device pnp 2e.d on # iLPC2AHB - end - device pnp 2e.e on # Mailbox - io 0x60 = 0xa40 - irq 0x70 = 0x00 - end - end - end + device pnp 2e.0 on end end - chip drivers/pc80/tpm + chip drivers/pc80/tpm # TPM device pnp 0c31.0 on end end - end # LPC Interface - device pci 1f.1 on end # P2SB - device pci 1f.2 on end # Power Management Controller - device pci 1f.4 on end # SMBus - device pci 1f.5 on end # SPI Controller + end + device pci 1f.1 on end # P2SB + device pci 1f.2 on end # Power Management Controller + device pci 1f.4 on end # SMBus + device pci 1f.5 on end # SPI Controller end end diff --git a/src/mainboard/supermicro/x11ssh/dsdt.asl b/src/mainboard/supermicro/x11/dsdt.asl similarity index 100% rename from src/mainboard/supermicro/x11ssh/dsdt.asl rename to src/mainboard/supermicro/x11/dsdt.asl diff --git a/src/mainboard/supermicro/x11ssh/ramstage.c b/src/mainboard/supermicro/x11/ramstage.c similarity index 96% rename from src/mainboard/supermicro/x11ssh/ramstage.c rename to src/mainboard/supermicro/x11/ramstage.c index 2672f73..f27aefc 100644 --- a/src/mainboard/supermicro/x11ssh/ramstage.c +++ b/src/mainboard/supermicro/x11/ramstage.c @@ -13,7 +13,7 @@
#include <bootstate.h> #include <soc/ramstage.h> -#include "gpio.h" +#include <variant/gpio.h>
void mainboard_silicon_init_params(FSP_SIL_UPD *params) { diff --git a/src/mainboard/supermicro/x11ssh/romstage.c b/src/mainboard/supermicro/x11/romstage.c similarity index 100% rename from src/mainboard/supermicro/x11ssh/romstage.c rename to src/mainboard/supermicro/x11/romstage.c diff --git a/src/mainboard/supermicro/x11/variants/ssh-tf/Kconfig b/src/mainboard/supermicro/x11/variants/ssh-tf/Kconfig new file mode 100644 index 0000000..f8954da --- /dev/null +++ b/src/mainboard/supermicro/x11/variants/ssh-tf/Kconfig @@ -0,0 +1,15 @@ +if BOARD_SUPERMICRO_X11SSH_TF + +config VARIANT_DIR + string + default "ssh-tf" + +config MAINBOARD_PART_NUMBER + string + default "X11SSH-TF" + +config CBFS_SIZE + hex + default 0x009aa000 if !VBOOT + +endif # BOARD_SUPERMICRO_X11SSH_TF diff --git a/src/mainboard/supermicro/x11/variants/ssh-tf/Kconfig.name b/src/mainboard/supermicro/x11/variants/ssh-tf/Kconfig.name new file mode 100644 index 0000000..fe3bf71 --- /dev/null +++ b/src/mainboard/supermicro/x11/variants/ssh-tf/Kconfig.name @@ -0,0 +1,2 @@ +config BOARD_SUPERMICRO_X11SSH_TF + bool "X11SSH-TF" diff --git a/src/mainboard/supermicro/x11ssh/variants/tf/board_info.txt b/src/mainboard/supermicro/x11/variants/ssh-tf/board_info.txt similarity index 61% rename from src/mainboard/supermicro/x11ssh/variants/tf/board_info.txt rename to src/mainboard/supermicro/x11/variants/ssh-tf/board_info.txt index f3eb3ef..893ccf4 100644 --- a/src/mainboard/supermicro/x11ssh/variants/tf/board_info.txt +++ b/src/mainboard/supermicro/x11/variants/ssh-tf/board_info.txt @@ -1,6 +1,7 @@ +Category: server Vendor name: Supermicro Board name: X11SSH-TF -Category: server +Board URL: https://www.supermicro.com/en/products/motherboard/X11SSH-TF ROM protocol: SPI ROM socketed: n Flashrom support: y diff --git a/src/mainboard/supermicro/x11/variants/ssh-tf/devicetree.cb b/src/mainboard/supermicro/x11/variants/ssh-tf/devicetree.cb new file mode 100644 index 0000000..f979b67 --- /dev/null +++ b/src/mainboard/supermicro/x11/variants/ssh-tf/devicetree.cb @@ -0,0 +1,103 @@ +chip soc/intel/skylake + + # GPE configuration + # Note that GPE events called out in ASL code rely on this + # route. i.e. If this route changes then the affected GPE + # offset bits also need to be changed. + register "gpe0_dw0" = "GPP_B" + register "gpe0_dw1" = "GPP_D" + register "gpe0_dw2" = "GPP_E" + + register "gen1_dec" = "0x007c0a01" # Super IO SWC + register "gen2_dec" = "0x000c0ca1" # IPMI KCS + register "gen3_dec" = "0x000c03e1" # UART3 + register "gen4_dec" = "0x000c02e1" # UART4 + + # PCIe configuration + # Enable JPCIE1 + register "PcieRpEnable[0]" = "1" + register "PcieRpClkReqSupport[0]" = "0" + + # Enable ASpeed PCI bridge + register "PcieRpEnable[2]" = "1" + register "PcieRpClkReqSupport[2]" = "0" + + # Enable X550T (10GbE) + register "PcieRpEnable[4]" = "1" + register "PcieRpClkReqSupport[4]" = "0" + + # Enable M.2 + register "PcieRpEnable[8]" = "1" + register "PcieRpClkReqSupport[8]" = "0" + + device domain 0 on + device pci 01.0 on end # unused + device pci 01.1 on + smbios_slot_desc "SlotTypePciExpressGen3X8" "SlotLengthShort" "CPU SLOT6 PCI-E 3.0 X8" "SlotDataBusWidth4X" + end # PCIE Slot (JPCIE1) + device pci 1c.0 on + smbios_slot_desc "SlotTypePciExpressGen3X4" "SlotLengthLong" "PCH SLOT4 PCI-E 3.0 X2(IN X4)" "SlotDataBusWidth2X" + end # PCI Express Port 1 (Slot JPCIE1) + device pci 1c.2 on + device pci 00.0 on + device pci 00.0 on end # Aspeed 2400 VGA + end + end # PCI Express Port 3 + device pci 1c.4 on + device pci 00.0 on end # 10GbE + device pci 00.1 on end # 10GbE + end # PCI Express Port 5 + device pci 1d.0 on + smbios_slot_desc "SlotTypeM2Socket3" "SlotLengthOther" "M.2 2280" "SlotDataBusWidth4X" + end # PCI Express Port 9 + device pci 1f.0 on # LPC Interface + chip drivers/ipmi + # On cold boot it takes a while for the BMC to start the IPMI service + register "wait_for_bmc" = "1" + register "bmc_boot_timeout" = "60" + device pnp ca2.0 on end # IPMI KCS + end + chip superio/common + device pnp 2e.0 on + chip superio/aspeed/ast2400 + device pnp 2e.2 on # SUART1 + io 0x60 = 0x3f8 + irq 0x70 = 4 + end + device pnp 2e.3 on # SUART2 + io 0x60 = 0x2f8 + irq 0x70 = 3 + end + device pnp 2e.4 on # SWC + io 0x60 = 0xa00 + io 0x62 = 0xa10 + io 0x64 = 0xa20 + io 0x66 = 0xa30 + irq 0x70 = 0xb + end + device pnp 2e.5 on # Keyboard + io 0x60 = 0x60 + io 0x62 = 0x64 + irq 0x70 = 1 + irq 0x72 = 0xc + end + device pnp 2e.7 on end # GPIO + device pnp 2e.b on # SUART3 + io 0x60 = 0x3e8 + irq 0x70 = 4 + end + device pnp 2e.c on # SUART4 + io 0x60 = 0x2e8 + irq 0x70 = 3 + end + device pnp 2e.d on end # iLPC2AHB + device pnp 2e.e on # Mailbox + io 0x60 = 0xa40 + irq 0x70 = 0x00 + end + end + end + end + end + end +end diff --git a/src/mainboard/supermicro/x11ssh/gpio.h b/src/mainboard/supermicro/x11/variants/ssh-tf/include/variant/gpio.h similarity index 100% rename from src/mainboard/supermicro/x11ssh/gpio.h rename to src/mainboard/supermicro/x11/variants/ssh-tf/include/variant/gpio.h diff --git a/src/mainboard/supermicro/x11ssh/vboot-ro-rwab.fmd b/src/mainboard/supermicro/x11/vboot-ro-rwab.fmd similarity index 100% rename from src/mainboard/supermicro/x11ssh/vboot-ro-rwab.fmd rename to src/mainboard/supermicro/x11/vboot-ro-rwab.fmd diff --git a/src/mainboard/supermicro/x11ssh/Kconfig.name b/src/mainboard/supermicro/x11ssh/Kconfig.name deleted file mode 100644 index a9b351b..0000000 --- a/src/mainboard/supermicro/x11ssh/Kconfig.name +++ /dev/null @@ -1,3 +0,0 @@ -config BOARD_SUPERMICRO_X11SSH_PLUS_TF - bool "X11SSH+-TF" - select BOARD_SUPERMICRO_BASEBOARD_X11SSH diff --git a/src/mainboard/supermicro/x11ssh/board_info.txt b/src/mainboard/supermicro/x11ssh/board_info.txt deleted file mode 100644 index 029d2a9..0000000 --- a/src/mainboard/supermicro/x11ssh/board_info.txt +++ /dev/null @@ -1,6 +0,0 @@ -Vendor name: Supermicro -Board name: X11SSH Baseboard -Category: server -ROM protocol: SPI -ROM socketed: n -Flashrom support: y