Matt Delco has uploaded this change for review. ( https://review.coreboot.org/29664
Change subject: mb/google/poppy/variants/atlas: enable eist ......................................................................
mb/google/poppy/variants/atlas: enable eist
Enable Enhanced Intel SpeedStep (EIST) on Atlas.
There's also a redundant dptf_enable line (the other instance is earlier in the file with a comment), so I just renamed the setting to kill two birds with one commit.
Change-Id: I57dca346c43feebcddf88f38d4e9f3105775b398 Signed-off-by: Matt Delco delco@chromium.org --- M src/mainboard/google/poppy/variants/atlas/devicetree.cb 1 file changed, 1 insertion(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/64/29664/1
diff --git a/src/mainboard/google/poppy/variants/atlas/devicetree.cb b/src/mainboard/google/poppy/variants/atlas/devicetree.cb index 229838f..6bdaa18 100644 --- a/src/mainboard/google/poppy/variants/atlas/devicetree.cb +++ b/src/mainboard/google/poppy/variants/atlas/devicetree.cb @@ -63,7 +63,7 @@ register "VmxEnable" = "1"
register "speed_shift_enable" = "1" - register "dptf_enable" = "1" + register "eist_enable" = "1" register "tdp_pl2_override" = "15" register "psys_pmax" = "45" register "tcc_offset" = "10"