[coreboot-gerrit] Change in coreboot[master]: soc/intel/cannonlake: Add back PM TIMER EMULATION

[Lijian Zhao (Code Review)]

Hello Pratikkumar V Prajapati, Subrata Banik, Wonkyu Kim, Hannah Williams,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/28937

to look at the new patch set (#2).

Change subject: soc/intel/cannonlake: Add back PM TIMER EMULATION
......................................................................

soc/intel/cannonlake: Add back PM TIMER EMULATION

ACPI PM timer emulation will be added back as default FSP stops TCO count
for power saving, which will also stop ACPI PM timer within PCH. CPU PM TIMER
EMULATION will help UEFI payload pass, instead of endless loop wait for
ACPI PM timer counter to increase.

BUG=N/A
TEST=Build and boot up fine with whiskey lake rvp board into UEFI shell.

Change-Id: Ie069e815e6244c3f85fabf51e186311621d316fd
Signed-off-by: Lijian Zhao 
---
M src/soc/intel/cannonlake/cpu.c
M src/soc/intel/cannonlake/include/soc/cpu.h
M src/soc/intel/cannonlake/include/soc/msr.h
3 files changed, 30 insertions(+), 3 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/37/28937/2