[coreboot-gerrit] Change in coreboot[master]: soc/intel/common/cse_lite: Perform a board specific reset

[Sridhar Siricilla (Code Review)]

Sridhar Siricilla has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44187 )

Change subject: soc/intel/common/cse_lite: Perform a board specific reset
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Patch Set 6:

(1 comment)

https://review.coreboot.org/c/coreboot/+/44187/6/src/soc/intel/common/block/... 
File src/soc/intel/common/block/cse/cse_lite.c:

https://review.coreboot.org/c/coreboot/+/44187/6/src/soc/intel/common/block/... 
PS6, Line 379: cse_board_reset
> For dedede (& volteer), this is going to send a command to the EC, which will cold-reset the SoC (to […]

Looks like Toggling SYSRST# pin doesn't result cold reset(power cycle).

Excerpt from EDS ..
*The normal behavior for a SYS_RESET# assertion is host partition reset without power cycle. However, if bit 3 of the CF9h I/O register is set to ‘1’ then SYS_RESET# will result in a full power-cycle reset*.

It's better to set 3rd bit of CF9 before sending AP_RESET command to EC. I think *TPM should also aware of reset of host cpu* in this case too. Can you please check if this helpful?