10 Aug
2020
10 Aug
'20
10 a.m.
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/40946 )
Change subject: nb/intel/sandybridge/raminit: Add ECC debug code ......................................................................
Patch Set 4: Code-Review+2
(1 comment)
https://review.coreboot.org/c/coreboot/+/40946/3/src/northbridge/intel/sandy... File src/northbridge/intel/sandybridge/raminit.c:
https://review.coreboot.org/c/coreboot/+/40946/3/src/northbridge/intel/sandy... PS3, Line 436: * interleave are enabled, but there's no gurantee for it.
It is
Done
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I76174ec962c9b0bb72852897586eb95d896d301e
Gerrit-Change-Number: 40946
Gerrit-PatchSet: 4
Gerrit-Owner: Patrick Rudolph patrick.rudolph@9elements.com
Gerrit-Reviewer: Angel Pons th3fanbus@gmail.com
Gerrit-Reviewer: Patrick Rudolph siro@das-labor.org
Gerrit-Reviewer: Paul Menzel paulepanter@users.sourceforge.net
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Gerrit-Comment-Date: Mon, 10 Aug 2020 10:00:45 +0000
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