David Hendricks has submitted this change. ( https://review.coreboot.org/c/coreboot/+/54036 )
Change subject: soc/intel/alderlake: Update meminit code due to upd changes FSP 2147 onwards ......................................................................
soc/intel/alderlake: Update meminit code due to upd changes FSP 2147 onwards
DisableDimmMc0Ch0 upds changed to DisableMc0Ch0 in new FSP releases. The definition of the upd also changed. Changed FSP meminit code to work based on new definition of the UPDs.
Before: 0:Enable both DIMMs, 1:Disable DIMM0, 2:Disable DIMM1, 3:Disable both DIMMs
After: 0:Enable, 1:Disable
TEST=Boot to OS
Cq-Depend: chrome-internal:3831865, chrome-internal:3831864, chrome-internal:3831913 Cq-Depend: chromium:TODO
Signed-off-by: Bora Guvendik bora.guvendik@intel.com Change-Id: I5af11ae99db3bbe3373a9bd4ce36453b58d62fec Reviewed-on: https://review.coreboot.org/c/coreboot/+/54036 Reviewed-by: Maulik V Vaghela maulik.v.vaghela@intel.com Reviewed-by: Tim Wawrzynczak twawrzynczak@chromium.org Tested-by: build bot (Jenkins) no-reply@coreboot.org --- M src/soc/intel/alderlake/meminit.c 1 file changed, 6 insertions(+), 5 deletions(-)
Approvals: build bot (Jenkins): Verified Maulik V Vaghela: Looks good to me, approved Tim Wawrzynczak: Looks good to me, approved
diff --git a/src/soc/intel/alderlake/meminit.c b/src/soc/intel/alderlake/meminit.c index 2c46b07..32496ce 100644 --- a/src/soc/intel/alderlake/meminit.c +++ b/src/soc/intel/alderlake/meminit.c @@ -132,7 +132,7 @@ [6] = { &mem_cfg->MemorySpdPtr12, &mem_cfg->MemorySpdPtr13, }, [7] = { &mem_cfg->MemorySpdPtr14, &mem_cfg->MemorySpdPtr15, }, }; - uint8_t *disable_dimm_upds[MRC_CHANNELS] = { + uint8_t *disable_channel_upds[MRC_CHANNELS] = { &mem_cfg->DisableMc0Ch0, &mem_cfg->DisableMc0Ch1, &mem_cfg->DisableMc0Ch2, @@ -147,16 +147,17 @@ mem_cfg->MemorySpdDataLen = data->spd_len;
for (ch = 0; ch < MRC_CHANNELS; ch++) { - uint8_t *disable_dimm_ptr = disable_dimm_upds[ch]; - *disable_dimm_ptr = 0; + uint8_t *disable_channel_ptr = disable_channel_upds[ch]; + bool enable_channel = 0;
for (dimm = 0; dimm < CONFIG_DIMMS_PER_CHANNEL; dimm++) { uint32_t *spd_ptr = spd_upds[ch][dimm];
*spd_ptr = data->spd[ch][dimm]; - if (!*spd_ptr) - *disable_dimm_ptr |= BIT(dimm); + if (*spd_ptr) + enable_channel = 1; } + *disable_channel_ptr = !enable_channel; } }