Sean Rhodes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/58342 )
Change subject: intel/tigerlake: Add missing IRQ ......................................................................
intel/tigerlake: Add missing IRQ
Add CNVi (14.3) to IRQ Table.
Signed-off-by: Sean Rhodes sean@starlabs.systems Change-Id: I5b793997f9ea954217871eb4656dacf6abe77e74 --- M src/soc/intel/tigerlake/fsp_params.c 1 file changed, 1 insertion(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/42/58342/1
diff --git a/src/soc/intel/tigerlake/fsp_params.c b/src/soc/intel/tigerlake/fsp_params.c index 892363b..e5e422b 100644 --- a/src/soc/intel/tigerlake/fsp_params.c +++ b/src/soc/intel/tigerlake/fsp_params.c @@ -164,6 +164,7 @@ .slot = PCH_DEV_SLOT_XHCI, .fns = { ANY_PIRQ(PCH_DEVFN_XHCI), + FIXED_INT_ANY_PIRQ(PCH_DEVFN_CNVI_WIFI, PCI_INT_A), }, }, {