build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/35732 )
Change subject: intel/fsp_baytrail: Rename from xx_DEV_FUNC ......................................................................
Patch Set 5:
(37 comments)
https://review.coreboot.org/c/coreboot/+/35732/5/src/soc/intel/fsp_baytrail/... File src/soc/intel/fsp_baytrail/fsp/chipset_fsp_util.c:
https://review.coreboot.org/c/coreboot/+/35732/5/src/soc/intel/fsp_baytrail/... PS5, Line 144: switch (dev->path.pci.devfn) { switch and case should be at the same indent
https://review.coreboot.org/c/coreboot/+/35732/5/src/soc/intel/fsp_baytrail/... PS5, Line 164: case SOC_DEVFN_MIPI: /* Camera / Image Signal Processing */ Possible switch case/default not preceded by break or fallthrough comment
https://review.coreboot.org/c/coreboot/+/35732/5/src/soc/intel/fsp_baytrail/... File src/soc/intel/fsp_baytrail/include/soc/pci_devs.h:
https://review.coreboot.org/c/coreboot/+/35732/5/src/soc/intel/fsp_baytrail/... PS5, Line 29: # define SOC_DEVFN_SOC PCI_DEVFN(SOC_DEV,SOC_FUNC) space required after that ',' (ctx:VxV)
https://review.coreboot.org/c/coreboot/+/35732/5/src/soc/intel/fsp_baytrail/... PS5, Line 35: # define SOC_DEVFN_GFX PCI_DEVFN(GFX_DEV,GFX_FUNC) space required after that ',' (ctx:VxV)
https://review.coreboot.org/c/coreboot/+/35732/5/src/soc/intel/fsp_baytrail/... PS5, Line 40: # define SOC_DEVFN_MIPI PCI_DEVFN(MIPI_DEV,MIPI_FUNC) space required after that ',' (ctx:VxV)
https://review.coreboot.org/c/coreboot/+/35732/5/src/soc/intel/fsp_baytrail/... PS5, Line 46: # define SOC_DEVFN_EMMC PCI_DEVFN(EMMC_DEV,EMMC_FUNC) space required after that ',' (ctx:VxV)
https://review.coreboot.org/c/coreboot/+/35732/5/src/soc/intel/fsp_baytrail/... PS5, Line 51: # define SOC_DEVFN_SDIO PCI_DEVFN(SDIO_DEV,SDIO_FUNC) space required after that ',' (ctx:VxV)
https://review.coreboot.org/c/coreboot/+/35732/5/src/soc/intel/fsp_baytrail/... PS5, Line 56: # define SOC_DEVFN_SD PCI_DEVFN(SD_DEV,SD_FUNC) space required after that ',' (ctx:VxV)
https://review.coreboot.org/c/coreboot/+/35732/5/src/soc/intel/fsp_baytrail/... PS5, Line 61: # define SOC_DEVFN_SATA PCI_DEVFN(SATA_DEV,SATA_FUNC) space required after that ',' (ctx:VxV)
https://review.coreboot.org/c/coreboot/+/35732/5/src/soc/intel/fsp_baytrail/... PS5, Line 69: # define SOC_DEVFN_XHCI PCI_DEVFN(XHCI_DEV,XHCI_FUNC) space required after that ',' (ctx:VxV)
https://review.coreboot.org/c/coreboot/+/35732/5/src/soc/intel/fsp_baytrail/... PS5, Line 74: # define SOC_DEVFN_LPE PCI_DEVFN(LPE_DEV,LPE_FUNC) space required after that ',' (ctx:VxV)
https://review.coreboot.org/c/coreboot/+/35732/5/src/soc/intel/fsp_baytrail/... PS5, Line 79: # define SOC_DEVFN_OTG PCI_DEVFN(LPE_DEV,LPE_FUNC) space required after that ',' (ctx:VxV)
https://review.coreboot.org/c/coreboot/+/35732/5/src/soc/intel/fsp_baytrail/... PS5, Line 84: # define SOC_DEVFN_MMC45 PCI_DEVFN(MMC45_DEV,MMC45_FUNC) space required after that ',' (ctx:VxV)
https://review.coreboot.org/c/coreboot/+/35732/5/src/soc/intel/fsp_baytrail/... PS5, Line 104: # define SOC_DEVFN_SIO_DMA1 PCI_DEVFN(SIO_DMA1_DEV,SIO_DMA1_FUNC) space required after that ',' (ctx:VxV)
https://review.coreboot.org/c/coreboot/+/35732/5/src/soc/intel/fsp_baytrail/... PS5, Line 105: # define SOC_DEVFN_I2C1 PCI_DEVFN(I2C1_DEV,I2C1_FUNC) space required after that ',' (ctx:VxV)
https://review.coreboot.org/c/coreboot/+/35732/5/src/soc/intel/fsp_baytrail/... PS5, Line 106: # define SOC_DEVFN_I2C2 PCI_DEVFN(I2C2_DEV,I2C2_FUNC) space required after that ',' (ctx:VxV)
https://review.coreboot.org/c/coreboot/+/35732/5/src/soc/intel/fsp_baytrail/... PS5, Line 107: # define SOC_DEVFN_I2C3 PCI_DEVFN(I2C3_DEV,I2C3_FUNC) space required after that ',' (ctx:VxV)
https://review.coreboot.org/c/coreboot/+/35732/5/src/soc/intel/fsp_baytrail/... PS5, Line 108: # define SOC_DEVFN_I2C4 PCI_DEVFN(I2C4_DEV,I2C4_FUNC) space required after that ',' (ctx:VxV)
https://review.coreboot.org/c/coreboot/+/35732/5/src/soc/intel/fsp_baytrail/... PS5, Line 109: # define SOC_DEVFN_I2C5 PCI_DEVFN(I2C5_DEV,I2C5_FUNC) space required after that ',' (ctx:VxV)
https://review.coreboot.org/c/coreboot/+/35732/5/src/soc/intel/fsp_baytrail/... PS5, Line 110: # define SOC_DEVFN_I2C6 PCI_DEVFN(I2C6_DEV,I2C6_FUNC) space required after that ',' (ctx:VxV)
https://review.coreboot.org/c/coreboot/+/35732/5/src/soc/intel/fsp_baytrail/... PS5, Line 111: # define SOC_DEVFN_I2C7 PCI_DEVFN(I2C7_DEV,I2C7_FUNC) space required after that ',' (ctx:VxV)
https://review.coreboot.org/c/coreboot/+/35732/5/src/soc/intel/fsp_baytrail/... PS5, Line 116: # define SOC_DEVFN_TXE PCI_DEVFN(TXE_DEV,TXE_FUNC) space required after that ',' (ctx:VxV)
https://review.coreboot.org/c/coreboot/+/35732/5/src/soc/intel/fsp_baytrail/... PS5, Line 121: # define SOC_DEVFN_HDA PCI_DEVFN(HDA_DEV,HDA_FUNC) space required after that ',' (ctx:VxV)
https://review.coreboot.org/c/coreboot/+/35732/5/src/soc/intel/fsp_baytrail/... PS5, Line 133: # define SOC_DEVFN_PCIE_PORT1 PCI_DEVFN(PCIE_DEV,PCIE_PORT1_FUNC) space required after that ',' (ctx:VxV)
https://review.coreboot.org/c/coreboot/+/35732/5/src/soc/intel/fsp_baytrail/... PS5, Line 134: # define SOC_DEVFN_PCIE_PORT2 PCI_DEVFN(PCIE_DEV,PCIE_PORT2_FUNC) space required after that ',' (ctx:VxV)
https://review.coreboot.org/c/coreboot/+/35732/5/src/soc/intel/fsp_baytrail/... PS5, Line 135: # define SOC_DEVFN_PCIE_PORT3 PCI_DEVFN(PCIE_DEV,PCIE_PORT3_FUNC) space required after that ',' (ctx:VxV)
https://review.coreboot.org/c/coreboot/+/35732/5/src/soc/intel/fsp_baytrail/... PS5, Line 136: # define SOC_DEVFN_PCIE_PORT4 PCI_DEVFN(PCIE_DEV,PCIE_PORT4_FUNC) space required after that ',' (ctx:VxV)
https://review.coreboot.org/c/coreboot/+/35732/5/src/soc/intel/fsp_baytrail/... PS5, Line 141: # define SOC_DEVFN_EHCI PCI_DEVFN(EHCI_DEV,EHCI_FUNC) space required after that ',' (ctx:VxV)
https://review.coreboot.org/c/coreboot/+/35732/5/src/soc/intel/fsp_baytrail/... PS5, Line 157: # define SOC_DEVFN_SIO_DMA2 PCI_DEVFN(SIO_DMA2_DEV,SIO_DMA2_FUNC) space required after that ',' (ctx:VxV)
https://review.coreboot.org/c/coreboot/+/35732/5/src/soc/intel/fsp_baytrail/... PS5, Line 158: # define SOC_DEVFN_PWM1 PCI_DEVFN(PWM1_DEV,PWM1_FUNC) space required after that ',' (ctx:VxV)
https://review.coreboot.org/c/coreboot/+/35732/5/src/soc/intel/fsp_baytrail/... PS5, Line 159: # define SOC_DEVFN_PWM2 PCI_DEVFN(PWM2_DEV,PWM2_FUNC) space required after that ',' (ctx:VxV)
https://review.coreboot.org/c/coreboot/+/35732/5/src/soc/intel/fsp_baytrail/... PS5, Line 160: # define SOC_DEVFN_HSUART1 PCI_DEVFN(HSUART1_DEV,HSUART1_FUNC) space required after that ',' (ctx:VxV)
https://review.coreboot.org/c/coreboot/+/35732/5/src/soc/intel/fsp_baytrail/... PS5, Line 161: # define SOC_DEVFN_HSUART2 PCI_DEVFN(HSUART2_DEV,HSUART2_FUNC) space required after that ',' (ctx:VxV)
https://review.coreboot.org/c/coreboot/+/35732/5/src/soc/intel/fsp_baytrail/... PS5, Line 162: # define SOC_DEVFN_SPI PCI_DEVFN(SPI_DEV,SPI_FUNC) space required after that ',' (ctx:VxV)
https://review.coreboot.org/c/coreboot/+/35732/5/src/soc/intel/fsp_baytrail/... PS5, Line 169: # define PCH_DEVFN_LPC PCI_DEVFN(LPC_DEV,LPC_FUNC) please, no space before tabs
https://review.coreboot.org/c/coreboot/+/35732/5/src/soc/intel/fsp_baytrail/... PS5, Line 169: # define PCH_DEVFN_LPC PCI_DEVFN(LPC_DEV,LPC_FUNC) space required after that ',' (ctx:VxV)
https://review.coreboot.org/c/coreboot/+/35732/5/src/soc/intel/fsp_baytrail/... PS5, Line 174: # define SOC_DEVFN_SMBUS PCI_DEVFN(SMBUS_DEV,SMBUS_FUNC) space required after that ',' (ctx:VxV)