Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/36864 )
Change subject: soc/intel/cannonlake: Add chip config to override CPU flex ratio ......................................................................
Patch Set 6:
(2 comments)
https://review.coreboot.org/c/coreboot/+/36864/2/src/soc/intel/cannonlake/ro... File src/soc/intel/cannonlake/romstage/fsp_params.c:
https://review.coreboot.org/c/coreboot/+/36864/2/src/soc/intel/cannonlake/ro... PS2, Line 80: if (CONFIG(OVERRIDE_CPU_FLEX_RATIO))
Can you please explain why it is faster with a lower clock speed?
we are suspecting cache misses more while running this for loop at higher freq, comparing core/uncore/memory freq. https://chromium.googlesource.com/chromiumos/platform/vboot/+/refs/heads/mas...
also submitted CL to optimized that code in vboot
also please refer to some study doc which we are also looking at to proof this theory.
https://software.intel.com/en-us/forums/software-tuning-performance-optimiza...
https://review.coreboot.org/c/coreboot/+/36864/5/src/soc/intel/cannonlake/ro... File src/soc/intel/cannonlake/romstage/fsp_params.c:
https://review.coreboot.org/c/coreboot/+/36864/5/src/soc/intel/cannonlake/ro... PS5, Line 79: flex_ratio = rdmsr(MSR_FLEX_RATIO);
because FIT has option to set the default value (other than 0) as well and if an user override FIT […]
please read latest patchset chip.h description, it covers your concern