Patrick Rudolph has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/40721 )
Change subject: nb/intel/sandybridge/raminit: Fix ECC scrub ......................................................................
Patch Set 3:
(2 comments)
https://review.coreboot.org/c/coreboot/+/40721/3//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/40721/3//COMMIT_MSG@12 PS3, Line 12: * Add ECC test code when DEBUG_RAM_SETUP is enabled : * Move ECC scrubbing after set_scrambling_seed() to be able to observe : what has been cleared. : * ECC scrubbing must happen after dram_dimm_set_mapping() : * Move method out of try_init_dram_ddr3() : * Add comments with observations made while fixing the code
Please split up according to this list. Cosmetic changes should be […]
Done
https://review.coreboot.org/c/coreboot/+/40721/3/src/northbridge/intel/sandy... File src/northbridge/intel/sandybridge/raminit.c:
https://review.coreboot.org/c/coreboot/+/40721/3/src/northbridge/intel/sandy... PS3, Line 390: printk(BIOS_ERR, "RAMINIT: DRAM not clear at addr 0x%lx\n",
Also, is there any use, in printing the read value at that address?
I don't see any difference. If it's not clear it hasn't been cleared. I personally don't care for the exact value there, it could be anything as the data in DRAM is xored with the scrambler. Isn't it clear from the context that ECC scrubbing failed, as it's between "RAMINIT: ECC scrub test ..." lines?
Moved to CB:40946