Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39021 )
Change subject: nb/intel/snb: Add PCI routing table for PEG root ports ......................................................................
Patch Set 1:
(2 comments)
https://review.coreboot.org/c/coreboot/+/39021/1/src/northbridge/intel/sandy... File src/northbridge/intel/sandybridge/acpi/peg.asl:
https://review.coreboot.org/c/coreboot/+/39021/1/src/northbridge/intel/sandy... PS1, Line 47: } If I'm not mistaken, we can just re-use the IRQM method of the PCH code. e.g.
Method (_PRT) { Return (_SB.PCI0.IRQM (1)) }
(and 2, 3, 4 as argument for the other ports)
https://review.coreboot.org/c/coreboot/+/39021/1/src/northbridge/intel/sandy... PS1, Line 137: Package() { 0x0000ffff, 0, 0, 16 },
I looked at a vendor DSDT of a Z77 board (ASUS P8Z77-V LX), and it matches what you report for the P […]
Let's just take 19, 16, 17, 18 / D, A, B, C then. If all sources say the same, I feel safe :)