[coreboot-gerrit] Change in ...coreboot[master]: soc/intel/cnl: Enable VT-d

[Nico Huber (Code Review)]

Nico Huber has submitted this change and it was merged. ( https://review.coreboot.org/c/coreboot/+/32432 )

Change subject: soc/intel/cnl: Enable VT-d
......................................................................

soc/intel/cnl: Enable VT-d

Enable VT-d through fsp upd VtdDisable. Update remapping structure
types in numerical order as all remapping structures of type 0 (DRHD)
enumerated before remapping structures of type 1 (RMRR), and so forth.

BUG=b:130351429
TEST=Booted to kernel and verified the DMAR table contents.

Change-Id: I1d20932e417b9d324edd98c8f2195dc228d2e092
Signed-off-by: John Zhao 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/32432
Tested-by: build bot (Jenkins) 
Reviewed-by: Nico Huber 
Reviewed-by: Pratikkumar V Prajapati 
---
M src/soc/intel/cannonlake/acpi.c
M src/soc/intel/cannonlake/chip.h
M src/soc/intel/cannonlake/romstage/fsp_params.c
M src/soc/intel/cannonlake/systemagent.c
4 files changed, 14 insertions(+), 15 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Nico Huber: Looks good to me, approved
  Pratikkumar V Prajapati: Looks good to me, but someone else must approve

diff --git a/src/soc/intel/cannonlake/acpi.c b/src/soc/intel/cannonlake/acpi.c
index 209e7c5..ff9da45 100644
--- a/src/soc/intel/cannonlake/acpi.c
+++ b/src/soc/intel/cannonlake/acpi.c
@@ -304,13 +304,6 @@
    	current += acpi_create_dmar_ds_pci(current, 0, 2, 0);

acpi_dmar_drhd_fixup(tmp, current);
-
-		/* Add RMRR entry */
-		tmp = current;
-		current += acpi_create_dmar_rmrr(current, 0,
-			sa_get_gsm_base(), sa_get_tolud_base() - 1);
-		current += acpi_create_dmar_ds_pci(current, 0, 2, 0);
-		acpi_dmar_rmrr_fixup(tmp, current);
    }

struct device *const ipu_dev = dev_find_slot(0, SA_DEVFN_IPU);
@@ -344,6 +337,13 @@
    	acpi_dmar_drhd_fixup(tmp, current);
    }

+	/* Add RMRR entry */
+	const unsigned long tmp = current;
+	current += acpi_create_dmar_rmrr(current, 0,
+		sa_get_gsm_base(), sa_get_tolud_base() - 1);
+	current += acpi_create_dmar_ds_pci(current, 0, 2, 0);
+	acpi_dmar_rmrr_fixup(tmp, current);
+
    return current;
 }

@@ -361,6 +361,7 @@

printk(BIOS_DEBUG, "ACPI:    * DMAR\n");
    acpi_create_dmar(dmar, DMAR_INTR_REMAP, soc_fill_dmar);
+
    current += dmar->header.length;
    current = acpi_align_current(current);
    acpi_add_table(rsdp, dmar);
diff --git a/src/soc/intel/cannonlake/chip.h b/src/soc/intel/cannonlake/chip.h
index f34528a..2b2a51f 100644
--- a/src/soc/intel/cannonlake/chip.h
+++ b/src/soc/intel/cannonlake/chip.h
@@ -344,9 +344,6 @@
    /* Enable Pch iSCLK */
    uint8_t pch_isclk;

-	/* Intel VT configuration */
-	uint8_t VtdDisable;
-
    /*
     * Acoustic Noise Mitigation
     * 0b - Disable
diff --git a/src/soc/intel/cannonlake/romstage/fsp_params.c b/src/soc/intel/cannonlake/romstage/fsp_params.c
index c71e4b5..6e492bb 100644
--- a/src/soc/intel/cannonlake/romstage/fsp_params.c
+++ b/src/soc/intel/cannonlake/romstage/fsp_params.c
@@ -101,6 +101,7 @@
    assert(dev != NULL);
    const config_t *config = dev->chip_info;
    FSP_M_CONFIG *m_cfg = &mupd->FspmConfig;
+	FSP_M_TEST_CONFIG *tconfig = &mupd->FspmTestConfig;

soc_memory_init_params(m_cfg, config);

@@ -113,6 +114,10 @@
    /* Set debug probe type */
    m_cfg->PlatformDebugConsent =
    	CONFIG_SOC_INTEL_CANNONLAKE_DEBUG_CONSENT;
+
+	/* Configure VT-d */
+	tconfig->VtdDisable = 0;
+
    mainboard_memory_init_params(mupd);
 }

diff --git a/src/soc/intel/cannonlake/systemagent.c b/src/soc/intel/cannonlake/systemagent.c
index d850b15..3f01f14 100644
--- a/src/soc/intel/cannonlake/systemagent.c
+++ b/src/soc/intel/cannonlake/systemagent.c
@@ -33,8 +33,6 @@
  */
 void soc_add_fixed_mmio_resources(struct device *dev, int *index)
 {
-	const struct soc_intel_cannonlake_config *const config = dev->chip_info;
-
    static const struct sa_mmio_descriptor soc_fixed_resources[] = {
    	{ PCIEXBAR, CONFIG_MMCONF_BASE_ADDRESS, CONFIG_SA_PCIEX_LENGTH,
    			"PCIEXBAR" },
@@ -63,10 +61,8 @@
    if ((pci_read_config32(dev, CAPID0_A) & VTD_DISABLE))
    	return;

-	if (!(config && config->VtdDisable)) {
-		sa_add_fixed_mmio_resources(dev, index, soc_vtd_resources,
+	sa_add_fixed_mmio_resources(dev, index, soc_vtd_resources,
    		ARRAY_SIZE(soc_vtd_resources));
-	}
 }

/*