[coreboot-gerrit] Change in coreboot[master]: sb/intel/*/lpc.c: Don't try to write read-only PCICMD bits

[Angel Pons (Code Review)]

Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/47038 )

Change subject: sb/intel/*/lpc.c: Don't try to write read-only PCICMD bits
......................................................................

Patch Set 2:

(1 comment)

https://review.coreboot.org/c/coreboot/+/47038/2//COMMIT_MSG 
Commit Message:

https://review.coreboot.org/c/coreboot/+/47038/2//COMMIT_MSG@9 
PS2, Line 9: For all these southbridges, the lower nibble of PCICMD is read-only.
> I've tested this on Lynxpoint-H, the write has no effect.

Done