Srinidhi N Kaushik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/38147 )
Change subject: soc/intel/tigerlake: Enable Audio on TGL ......................................................................
Patch Set 18:
(3 comments)
https://review.coreboot.org/c/coreboot/+/38147/12//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/38147/12//COMMIT_MSG@12 PS12, Line 12: none
No bug?
I dont have a bug for enabling Audio in upstream, do you want me to create one ?
https://review.coreboot.org/c/coreboot/+/38147/12//COMMIT_MSG@15 PS12, Line 15:
You mentioned that there is a workaround required to make this change work. […]
The WA will be in the chrome-internal fsp repo once Nick's uprev patch is merged. Will push it an send you the link once ready.
https://review.coreboot.org/c/coreboot/+/38147/8/src/soc/intel/tigerlake/rom... File src/soc/intel/tigerlake/romstage/fsp_params_tgl.c:
https://review.coreboot.org/c/coreboot/+/38147/8/src/soc/intel/tigerlake/rom... PS8, Line 108: m_cfg->PchHdaAudioLinkDmicClkAPinMux[0] = GPIO_VER2_LP_MUXING_DMIC0_CLKA_GPP_S6; : m_cfg->PchHdaAudioLinkDmicClkBPinMux[0] = GPIO_VER2_LP_MUXING_DMIC0_CLKB_GPP_S2; : m_cfg->PchHdaAudioLinkDmicDataPinMux[0] = GPIO_VER2_LP_MUXING_DMIC0_DATA_GPP_S7; : m_cfg->PchHdaAudioLinkDmicClkAPinMux[1] = GPIO_VER2_LP_MUXING_DMIC1_CLKA_GPP_S4; : m_cfg->PchHdaAudioLinkDmicClkBPinMux[1] = GPIO_VER2_LP_MUXING_DMIC1_CLKB_GPP_S3; : m_cfg->PchHdaAudioLinkDmicDataPinMux[1] = GPIO_VER2_LP_MUXING_DMIC1_DATA_GPP_S5;
Is the workaround uploaded somewhere?
The WA is on top Nick's FSP uprev patch. I will push it once that gets merged.