Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/41506 )
Change subject: mb/google/deltaur: Add tcss.asl ......................................................................
mb/google/deltaur: Add tcss.asl
Add tcss.asl to support TCSS power management. For the detail please refer cb:39785.
BUG=none TEST=Check TBT PCIe root ports: 00:07.0/00:07.1/00:07.2/00:07.3 /sys/bus/pci/devices/bus:device:func/power suspend and active time can increase.
Signed-off-by: Eric Lai ericr_lai@compal.corp-partner.google.com Change-Id: I432f3d6643de13b08c07e47f799c0ecdfe047de6 Reviewed-on: https://review.coreboot.org/c/coreboot/+/41506 Reviewed-by: Tim Wawrzynczak twawrzynczak@chromium.org Tested-by: build bot (Jenkins) no-reply@coreboot.org --- M src/mainboard/google/deltaur/dsdt.asl 1 file changed, 1 insertion(+), 0 deletions(-)
Approvals: build bot (Jenkins): Verified Tim Wawrzynczak: Looks good to me, approved
diff --git a/src/mainboard/google/deltaur/dsdt.asl b/src/mainboard/google/deltaur/dsdt.asl index fe86e15..fac58bd 100644 --- a/src/mainboard/google/deltaur/dsdt.asl +++ b/src/mainboard/google/deltaur/dsdt.asl @@ -25,6 +25,7 @@ { #include <soc/intel/common/block/acpi/acpi/northbridge.asl> #include <soc/intel/tigerlake/acpi/southbridge.asl> + #include <soc/intel/tigerlake/acpi/tcss.asl> } }