Attention is currently required from: Hung-Te Lin, Rex-BC Chen, Ryan Chuang.
Hello Hung-Te Lin, build bot (Jenkins), Ryan Chuang, Yu-Ping Wu,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/56105
to look at the new patch set (#3).
Change subject: vc/mediatek/mt8195: Enable VREF calibration at DDR3200 for S0 stability
......................................................................
vc/mediatek/mt8195: Enable VREF calibration at DDR3200 for S0 stability
Signed-off-by: Ryan Chuang ryan.chuang@mediatek.corp-partner.google.com
Change-Id: I9df776b393f6b6166d1d6f02d5e96bd7ebc4a707
---
M src/vendorcode/mediatek/mt8195/dramc/dramc_pi_main.c
1 file changed, 1 insertion(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/05/56105/3
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I9df776b393f6b6166d1d6f02d5e96bd7ebc4a707
Gerrit-Change-Number: 56105
Gerrit-PatchSet: 3
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Gerrit-Reviewer: Hung-Te Lin
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