Furquan Shaikh has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/42109 )
Change subject: drivers/intel/fsp2_0: Allow SoC/mainboard to update NvsBufferPtr ......................................................................
drivers/intel/fsp2_0: Allow SoC/mainboard to update NvsBufferPtr
This change moves the check for NvsBufferPtr in S3 resume case to happen just before FSP-M is called. This allows SoC/mainboard code to set NvsBufferPtr if it doesn't use the default MRC cache driver.
BUG=b:155990176
Change-Id: Ia272573ad7117a0cb851f0bfe6a4c7989bc64cde Signed-off-by: Furquan Shaikh furquan@google.com --- M src/drivers/intel/fsp2_0/memory_init.c 1 file changed, 10 insertions(+), 9 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/09/42109/1
diff --git a/src/drivers/intel/fsp2_0/memory_init.c b/src/drivers/intel/fsp2_0/memory_init.c index d90b181..7f5d389 100644 --- a/src/drivers/intel/fsp2_0/memory_init.c +++ b/src/drivers/intel/fsp2_0/memory_init.c @@ -196,15 +196,6 @@
/* Configure bootmode */ if (s3wake) { - /* - * For S3 resume case, if valid mrc cache data is not found or - * RECOVERY_MRC_CACHE hash verification fails, the S3 data - * pointer would be null and S3 resume fails with fsp-m - * returning error. Invoking a reset here saves time. - */ - if (!arch_upd->NvsBufferPtr) - /* FIXME: A "system" reset is likely enough: */ - full_reset(); arch_upd->BootMode = FSP_BOOT_ON_S3_RESUME; } else { if (arch_upd->NvsBufferPtr) @@ -296,6 +287,16 @@ /* Give SoC and mainboard a chance to update the UPD */ platform_fsp_memory_init_params_cb(&fspm_upd, fsp_version);
+ /* + * For S3 resume case, if valid mrc cache data is not found or + * RECOVERY_MRC_CACHE hash verification fails, the S3 data + * pointer would be null and S3 resume fails with fsp-m + * returning error. Invoking a reset here saves time. + */ + if (s3wake && !arch_upd->NvsBufferPtr) + /* FIXME: A "system" reset is likely enough: */ + full_reset(); + if (CONFIG(MMA)) setup_mma(&fspm_upd.FspmConfig);