Marc Jones has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/48492 )
Change subject: soc/intel/xeon_sp: Allow ACPI SMI GNVS ......................................................................
soc/intel/xeon_sp: Allow ACPI SMI GNVS
Now that SMM is enabled and GNVS is cleaned up, allow the GNVS SMI.
Change-Id: I5e0bd092ff3b76b63a4138eaf7ca7dfa57ad3e1e Signed-off-by: Marc Jones marcjones@sysproconsulting.com --- M src/soc/intel/xeon_sp/Kconfig 1 file changed, 0 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/92/48492/1
diff --git a/src/soc/intel/xeon_sp/Kconfig b/src/soc/intel/xeon_sp/Kconfig index 2028a5e..46e5e3d 100644 --- a/src/soc/intel/xeon_sp/Kconfig +++ b/src/soc/intel/xeon_sp/Kconfig @@ -36,7 +36,6 @@ select POSTCAR_STAGE select IOAPIC select PARALLEL_MP - select ACPI_NO_SMI_GNVS select INTEL_DESCRIPTOR_MODE_CAPABLE select SOC_INTEL_COMMON_BLOCK select SOC_INTEL_COMMON_BLOCK_CPU