[coreboot-gerrit] Change in coreboot[master]: soc/intel/cannonlake: Allow coreboot to handle SPI lockdown

[Subrata Banik (Code Review)]

Hello Patrick Rudolph, Aamir Bohra, Tim Wawrzynczak, V Sowmya, build bot (Jenkins), Furquan Shaikh,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/35299

to look at the new patch set (#2).

Change subject: soc/intel/cannonlake: Allow coreboot to handle SPI lockdown
......................................................................

soc/intel/cannonlake: Allow coreboot to handle SPI lockdown

This patch disables FSP-S SPI lockdown UPDs and lets coreboot perform
SPI lockdown (i.e.flash register DLOCK, FLOCKDN, and WRSDIS before
end of post) in ramstage.

BUG=b:138200201
TEST=FSP debug build suggests those UPDs are disable now.

Change-Id: Id7a6b9859e058b9f1ec1bd45d2c388c02b8ac18c
Signed-off-by: Subrata Banik 
---
M src/soc/intel/cannonlake/fsp_params.c
1 file changed, 6 insertions(+), 8 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/99/35299/2