[coreboot-gerrit] Change in coreboot[master]: soc/amd/stoneyridge: Correct top of DRAM reporting by AGESA

[Marshall Dawson (Code Review)]

Marshall Dawson has uploaded this change for review. ( https://review.coreboot.org/29229

Change subject: soc/amd/stoneyridge: Correct top of DRAM reporting by AGESA
......................................................................

soc/amd/stoneyridge: Correct top of DRAM reporting by AGESA

Accurately reflect the intention of the syslimit value returned
from AmdInitPost().  Assume FFs for the non-present bits.

BUG=b:118178425
TEST=Boot Grunt and verify reported value = TOM2-1.

Change-Id: Ie8ea4fcbfd52c46ad441890f0decaf0f55816cfd
Signed-off-by: Marshall Dawson 
---
M src/soc/amd/common/block/pi/agesawrapper.c
1 file changed, 1 insertion(+), 1 deletion(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/29/29229/1

diff --git a/src/soc/amd/common/block/pi/agesawrapper.c b/src/soc/amd/common/block/pi/agesawrapper.c
index 49a2c4c..87e0b69 100644
--- a/src/soc/amd/common/block/pi/agesawrapper.c
+++ b/src/soc/amd/common/block/pi/agesawrapper.c
@@ -164,7 +164,7 @@
    	break;
    }

-	syslimit = (u64)parms->MemConfig.SysLimit * 64 * KiB;
+	syslimit = (u64)(parms->MemConfig.SysLimit + 1) * 64 * KiB - 1;
    bottomio = (u64)parms->MemConfig.BottomIo * 64 * KiB;

uma_size = (u64)parms->MemConfig.UmaSize * 64 * KiB;