Andrey Petrov has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/38549 )
Change subject: mainboard/ocp: Add support for OCP platform TiogaPass ......................................................................
Patch Set 24:
(3 comments)
nice. One major issue I have is that we can't set up GPIOs at will and have to rely on FSP.
https://review.coreboot.org/c/coreboot/+/38549/24/src/mainboard/ocp/tiogapas... File src/mainboard/ocp/tiogapass/board.fmd:
https://review.coreboot.org/c/coreboot/+/38549/24/src/mainboard/ocp/tiogapas... PS24, Line 8: MISC_RW we do not have RO here, everything is RW. Lets collapse these two sections and get rid of unused sections
https://review.coreboot.org/c/coreboot/+/38549/24/src/mainboard/ocp/tiogapas... File src/mainboard/ocp/tiogapass/romstage.c:
https://review.coreboot.org/c/coreboot/+/38549/24/src/mainboard/ocp/tiogapas... PS24, Line 24: #define PCH_SERVER_BIOS_FLAG 1 again I do not think it make sense to have this flag
https://review.coreboot.org/c/coreboot/+/38549/24/src/mainboard/ocp/tiogapas... PS24, Line 37: mupd->FspmConfig.GpioConfig.GpioTable = (UPD_GPIO_INIT_CONFIG *) tp_gpio_table; : mupd->FspmConfig.GpioConfig.NumberOfEntries = : sizeof(tp_gpio_table)/sizeof(UPD_GPIO_INIT_CONFIG); So on this board we have C62x PCH. What are the SKL-H macros? I think we should try to get GPIO on C62x work rather than on relying on FSP to do it for us