HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/39934 )
Change subject: nb/i945: Remove unneeded white spaces ......................................................................
nb/i945: Remove unneeded white spaces
Change-Id: I8a1eadcdc51dedd1e17eb6ae7847d9209b2bd598 Signed-off-by: Elyes HAOUAS ehaouas@noos.fr --- M src/northbridge/intel/i945/acpi/i945.asl M src/northbridge/intel/i945/northbridge.c M src/northbridge/intel/i945/rcven.c 3 files changed, 11 insertions(+), 19 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/34/39934/1
diff --git a/src/northbridge/intel/i945/acpi/i945.asl b/src/northbridge/intel/i945/acpi/i945.asl index 777d030..7e5fad6 100644 --- a/src/northbridge/intel/i945/acpi/i945.asl +++ b/src/northbridge/intel/i945/acpi/i945.asl @@ -52,9 +52,9 @@
Name (PDRS, ResourceTemplate() { Memory32Fixed(ReadWrite, DEFAULT_RCBA, 0x00004000) - Memory32Fixed(ReadWrite, DEFAULT_MCHBAR, 0x00004000) - Memory32Fixed(ReadWrite, DEFAULT_DMIBAR, 0x00001000) - Memory32Fixed(ReadWrite, DEFAULT_EPBAR, 0x00001000) + Memory32Fixed(ReadWrite, DEFAULT_MCHBAR, 0x00004000) + Memory32Fixed(ReadWrite, DEFAULT_DMIBAR, 0x00001000) + Memory32Fixed(ReadWrite, DEFAULT_EPBAR, 0x00001000) Memory32Fixed(ReadWrite, CONFIG_MMCONF_BASE_ADDRESS, 0x04000000) Memory32Fixed(ReadWrite, 0xfed20000, 0x00020000) // Misc ICH Memory32Fixed(ReadWrite, 0xfed40000, 0x00005000) // Misc ICH diff --git a/src/northbridge/intel/i945/northbridge.c b/src/northbridge/intel/i945/northbridge.c index a91efbf..dd63263 100644 --- a/src/northbridge/intel/i945/northbridge.c +++ b/src/northbridge/intel/i945/northbridge.c @@ -107,8 +107,7 @@ delta_cbmem = tomk_stolen - cbmem_topk; tomk_stolen -= delta_cbmem;
- printk(BIOS_DEBUG, "Unused RAM between cbmem_top and TOM: 0x%xK\n", - delta_cbmem); + printk(BIOS_DEBUG, "Unused RAM between cbmem_top and TOM: 0x%xK\n", delta_cbmem);
/* The following needs to be 2 lines, otherwise the second diff --git a/src/northbridge/intel/i945/rcven.c b/src/northbridge/intel/i945/rcven.c index eebd492..a859fe8 100644 --- a/src/northbridge/intel/i945/rcven.c +++ b/src/northbridge/intel/i945/rcven.c @@ -111,8 +111,7 @@ return -1; }
- set_receive_enable(channel_offset, *mediumcoarse & 3, - *mediumcoarse >> 2); + set_receive_enable(channel_offset, *mediumcoarse & 3, *mediumcoarse >> 2);
MCHBAR8(C0WL0REOST + channel_offset) = *fine;
@@ -134,8 +133,7 @@ } *mediumcoarse -= 4;
- set_receive_enable(channel_offset, *mediumcoarse & 3, - *mediumcoarse >> 2); + set_receive_enable(channel_offset, *mediumcoarse & 3, *mediumcoarse >> 2);
reg32 = sample_strobes(channel_offset, sysinfo);
@@ -166,8 +164,7 @@ return -1; }
- set_receive_enable(channel_offset, *mediumcoarse & 3, - *mediumcoarse >> 2); + set_receive_enable(channel_offset, *mediumcoarse & 3, *mediumcoarse >> 2); } else { *fine += 0x80; } @@ -187,8 +184,7 @@ for (;;) { MCHBAR8(C0WL0REOST + channel_offset) = *fine;
- set_receive_enable(channel_offset, *mediumcoarse & 3, - *mediumcoarse >> 2); + set_receive_enable(channel_offset, *mediumcoarse & 3, *mediumcoarse >> 2);
rcvenmt = sample_strobes(channel_offset, sysinfo);
@@ -221,8 +217,7 @@ printk(BIOS_SPEW, " %s()\n", __func__);
counter = 8; - set_receive_enable(channel_offset, *mediumcoarse & 3, - *mediumcoarse >> 2); + set_receive_enable(channel_offset, *mediumcoarse & 3, *mediumcoarse >> 2);
for (;;) { MCHBAR8(C0WL0REOST + channel_offset) = *fine; @@ -260,8 +255,7 @@ *fine -= 7; if (*fine >= 0xf9) { *mediumcoarse -= 2; - set_receive_enable(channel_offset, *mediumcoarse & 3, - *mediumcoarse >> 2); + set_receive_enable(channel_offset, *mediumcoarse & 3, *mediumcoarse >> 2); }
*fine &= ~(1 << 3); @@ -276,8 +270,7 @@ * a lot of if ()s so let's just pass 0 or 0x80 for the channel offset. */
-static int receive_enable_autoconfig(int channel_offset, - struct sys_info *sysinfo) +static int receive_enable_autoconfig(int channel_offset, struct sys_info *sysinfo) { u8 mediumcoarse; u8 fine;