18 Feb
2020
18 Feb
'20
12:22 p.m.
9elements QA has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/36786 )
Change subject: soc/intel/common: Add function to wait for CSE to enter Soft Temp Disable mode ......................................................................
Patch Set 45:
Automatic boot test returned (PASS/FAIL/TOTAL): 3/0/3 Emulation targets: EMULATION_QEMU_X86_Q35 using payload TianoCore : SUCCESS : https://lava.9esec.io/r/684 EMULATION_QEMU_X86_Q35 using payload SeaBIOS : SUCCESS : https://lava.9esec.io/r/683 EMULATION_QEMU_X86_I440FX using payload SeaBIOS : SUCCESS : https://lava.9esec.io/r/682
Please note: This test is under development and might not be accurate at all!
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: Ibdcf01f31b0310932b8e834ae83144f8a67f1fef
Gerrit-Change-Number: 36786
Gerrit-PatchSet: 45
Gerrit-Owner: Sridhar Siricilla sridhar.siricilla@intel.com
Gerrit-Reviewer: Aamir Bohra aamir.bohra@intel.com
Gerrit-Reviewer: Furquan Shaikh furquan@google.com
Gerrit-Reviewer: Nico Huber nico.h@gmx.de
Gerrit-Reviewer: Patrick Georgi pgeorgi@google.com
Gerrit-Reviewer: Patrick Rudolph siro@das-labor.org
Gerrit-Reviewer: Rizwan Qureshi rizwan.qureshi@intel.com
Gerrit-Reviewer: Sridhar Siricilla sridhar.siricilla@intel.com
Gerrit-Reviewer: Sridhar Siricilla sridhar.siricilla@intel.corp-partner.google.com
Gerrit-Reviewer: Subrata Banik subrata.banik@intel.com
Gerrit-Reviewer: V Sowmya v.sowmya@intel.com
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Gerrit-CC: Maxim Polyakov max.senia.poliak@gmail.com
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Gerrit-Comment-Date: Tue, 18 Feb 2020 15:22:16 +0000
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