[coreboot-gerrit] Change in coreboot[master]: soc/intel/icelake: Move early pch initialization from bootblock to ro...

[Furquan Shaikh (Code Review)]

Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/36627 )

Change subject: soc/intel/icelake: Move early pch initialization from bootblock to romstage
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Patch Set 4:

(1 comment)

https://review.coreboot.org/c/coreboot/+/36627/2/src/soc/intel/icelake/romst... 
File src/soc/intel/icelake/romstage/pch.c:

https://review.coreboot.org/c/coreboot/+/36627/2/src/soc/intel/icelake/romst... 
PS2, Line 85: pmc_gpe_init
> TPM is working. here is the log with this changes […]

What do the GPE registers look like in verstage? I am curious how GPE STS bits are getting set.