[coreboot-gerrit] Change in coreboot[master]: [WIP] AGESA,binaryPI: Set max p-state early

[Michał Żygowski (Code Review)]

Michał Żygowski has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/37754 )

Change subject: [WIP] AGESA,binaryPI: Set max p-state early
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Patch Set 1:
> Patch Set 1:
>
> At first glance no difference in timestamps (with console loglevel 0) on apu1.

Used:
    msr_t msr = { .hi = 0, .lo = 0 };
    wrmsr(PS_CTL_REG, msr);
of course