Felix Held has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/45479 )
Change subject: soc/amd/picasso/acpi: add UART DMA controller devices ......................................................................
soc/amd/picasso/acpi: add UART DMA controller devices
The four Designware UARTs in the SoC each have a PL330 DMA controller attached that shares the IRQ of the UART and has its two DMA channels hard wired to the RX and TX channels of the UART. This patch exposes those DMA controllers as ACPI devices with the HID AMD0023. At 3Mbaud we need to use the DMA controller to avoid that some bytes got dropped occasionally.
The kernel-side patches are currently still work in progress.
BUG=b:160208269
Change-Id: I54c3f3d9b6806884366fdef131306c02d1142657 Signed-off-by: Julian Schroeder julian.schroeder@amd.corp-partner.google.com --- M src/soc/amd/picasso/acpi/sb_fch.asl 1 file changed, 127 insertions(+), 13 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/79/45479/1
diff --git a/src/soc/amd/picasso/acpi/sb_fch.asl b/src/soc/amd/picasso/acpi/sb_fch.asl index 6cbfc5f..28ac988 100644 --- a/src/soc/amd/picasso/acpi/sb_fch.asl +++ b/src/soc/amd/picasso/acpi/sb_fch.asl @@ -92,6 +92,122 @@ } }
+Device (DMA0) { + Name (_HID, "AMD0023") + Name (_UID, 0x0) + Method (_CRS, 0) { + Local0 = ResourceTemplate() { + Interrupt ( + ResourceConsumer, + Edge, + ActiveHigh, + Shared, , , IRQR) + { 0 } + Memory32Fixed (ReadWrite, APU_DMAC0_BASE, 0x1000) + } + CreateDWordField (Local0, IRQR._INT, IRQN) + If (PMOD) { + IRQN = IUA0 + } Else { + IRQN = PUA0 + } + If (IRQN == 0x1f) { + Return (ResourceTemplate() { + Memory32Fixed (ReadWrite, APU_DMAC0_BASE, 0x1000) + }) + } Else { + Return (Local0) + } + } +} + +Device (DMA1) { + Name (_HID, "AMD0023") + Name (_UID, 0x0) + Method (_CRS, 0) { + Local0 = ResourceTemplate() { + Interrupt ( + ResourceConsumer, + Edge, + ActiveHigh, + Shared, , , IRQR) + { 0 } + Memory32Fixed (ReadWrite, APU_DMAC1_BASE, 0x1000) + } + CreateDWordField (Local0, IRQR._INT, IRQN) + If (PMOD) { + IRQN = IUA1 + } Else { + IRQN = PUA1 + } + If (IRQN == 0x1f) { + Return (ResourceTemplate() { + Memory32Fixed (ReadWrite, APU_DMAC1_BASE, 0x1000) + }) + } Else { + Return (Local0) + } + } +} + +Device (DMA2) { + Name (_HID, "AMD0023") + Name (_UID, 0x0) + Method (_CRS, 0) { + Local0 = ResourceTemplate() { + Interrupt ( + ResourceConsumer, + Edge, + ActiveHigh, + Shared, , , IRQR) + { 0 } + Memory32Fixed (ReadWrite, APU_DMAC2_BASE, 0x1000) + } + CreateDWordField (Local0, IRQR._INT, IRQN) + If (PMOD) { + IRQN = IUA2 + } Else { + IRQN = PUA2 + } + If (IRQN == 0x1f) { + Return (ResourceTemplate() { + Memory32Fixed (ReadWrite, APU_DMAC2_BASE, 0x1000) + }) + } Else { + Return (Local0) + } + } +} + +Device (DMA3) { + Name (_HID, "AMD0023") + Name (_UID, 0x0) + Method (_CRS, 0) { + Local0 = ResourceTemplate() { + Interrupt ( + ResourceConsumer, + Edge, + ActiveHigh, + Shared, , , IRQR) + { 0 } + Memory32Fixed (ReadWrite, APU_DMAC3_BASE, 0x1000) + } + CreateDWordField (Local0, IRQR._INT, IRQN) + If (PMOD) { + IRQN = IUA3 + } Else { + IRQN = PUA3 + } + If (IRQN == 0x1f) { + Return (ResourceTemplate() { + Memory32Fixed (ReadWrite, APU_DMAC3_BASE, 0x1000) + }) + } Else { + Return (Local0) + } + } +} + Device (FUR0) { Name (_HID, "AMD0020") @@ -105,7 +221,8 @@ Exclusive, , , IRQR) { 0 } Memory32Fixed (ReadWrite, APU_UART0_BASE, 0x1000) - Memory32Fixed (ReadWrite, APU_DMAC0_BASE, 0x1000) + FixedDMA (0x0, 0x0, Width32Bit, ) + FixedDMA (0x0, 0x1, Width32Bit, ) } CreateDWordField (Local0, IRQR._INT, IRQN) If (PMOD) { @@ -116,13 +233,11 @@ If (IRQN == 0x1f) { Return (ResourceTemplate() { Memory32Fixed (ReadWrite, APU_UART0_BASE, 0x1000) - Memory32Fixed (ReadWrite, APU_DMAC0_BASE, 0x1000) }) } Else { Return (Local0) } } - Name (_PR0, Package () { _SB.AOAC.FUR0 }) Name (_PR2, Package () { _SB.AOAC.FUR0 }) Name (_PR3, Package () { _SB.AOAC.FUR0 }) @@ -145,10 +260,11 @@ ResourceConsumer, Edge, ActiveHigh, - Exclusive, , , IRQR) + Shared, , , IRQR) { 0 } Memory32Fixed (ReadWrite, APU_UART1_BASE, 0x1000) - Memory32Fixed (ReadWrite, APU_DMAC1_BASE, 0x1000) + FixedDMA (0x1, 0x0, Width32Bit, ) + FixedDMA (0x1, 0x1, Width32Bit, ) } CreateDWordField (Local0, IRQR._INT, IRQN) If (PMOD) { @@ -159,13 +275,11 @@ If (IRQN == 0x1f) { Return (ResourceTemplate() { Memory32Fixed (ReadWrite, APU_UART1_BASE, 0x1000) - Memory32Fixed (ReadWrite, APU_DMAC1_BASE, 0x1000) }) } Else { Return (Local0) } } - Name (_PR0, Package () { _SB.AOAC.FUR1 }) Name (_PR2, Package () { _SB.AOAC.FUR1 }) Name (_PR3, Package () { _SB.AOAC.FUR1 }) @@ -188,10 +302,11 @@ ResourceConsumer, Edge, ActiveHigh, - Exclusive, , , IRQR) + Shared, , , IRQR) { 0 } Memory32Fixed (ReadWrite, APU_UART2_BASE, 0x1000) - Memory32Fixed (ReadWrite, APU_DMAC2_BASE, 0x1000) + FixedDMA (0x2, 0x0, Width32Bit, ) + FixedDMA (0x2, 0x1, Width32Bit, ) } CreateDWordField (Local0, IRQR._INT, IRQN) If (PMOD) { @@ -202,7 +317,6 @@ If (IRQN == 0x1f) { Return (ResourceTemplate() { Memory32Fixed (ReadWrite, APU_UART2_BASE, 0x1000) - Memory32Fixed (ReadWrite, APU_DMAC2_BASE, 0x1000) }) } Else { Return (Local0) @@ -231,10 +345,11 @@ ResourceConsumer, Edge, ActiveHigh, - Exclusive, , , IRQR) + Shared, , , IRQR) { 0 } Memory32Fixed (ReadWrite, APU_UART3_BASE, 0x1000) - Memory32Fixed (ReadWrite, APU_DMAC3_BASE, 0x1000) + FixedDMA (0x3, 0x0, Width32Bit, ) + FixedDMA (0x3, 0x1, Width32Bit, ) } CreateDWordField (Local0, IRQR._INT, IRQN) If (PMOD) { @@ -245,7 +360,6 @@ If (IRQN == 0x1f) { Return (ResourceTemplate() { Memory32Fixed (ReadWrite, APU_UART3_BASE, 0x1000) - Memory32Fixed (ReadWrite, APU_DMAC3_BASE, 0x1000) }) } Else { Return (Local0)