Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/37079 )
Change subject: southbridge/intel/common/spi.c: Define __SIMPLE_DEVICE__ ......................................................................
southbridge/intel/common/spi.c: Define __SIMPLE_DEVICE__
This simplifies PCI config space accessors.
Change-Id: Idf0f90ee2dc1dcb0003ef5d56eff44ca9a5634e7 Signed-off-by: Arthur Heymans arthur@aheymans.xyz Reviewed-on: https://review.coreboot.org/c/coreboot/+/37079 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Nico Huber nico.h@gmx.de --- M src/southbridge/intel/common/spi.c 1 file changed, 2 insertions(+), 8 deletions(-)
Approvals: build bot (Jenkins): Verified Nico Huber: Looks good to me, approved
diff --git a/src/southbridge/intel/common/spi.c b/src/southbridge/intel/common/spi.c index 4926df9..3b7842d 100644 --- a/src/southbridge/intel/common/spi.c +++ b/src/southbridge/intel/common/spi.c @@ -15,6 +15,8 @@ * GNU General Public License for more details. */
+#define __SIMPLE_DEVICE__ + /* This file is derived from the flashrom project. */ #include <arch/early_variables.h> #include <stdint.h> @@ -274,11 +276,7 @@ #define RCBA 0xf0 #define SBASE 0x54
-#ifdef __SIMPLE_DEVICE__ static void *get_spi_bar(pci_devfn_t dev) -#else -static void *get_spi_bar(struct device *dev) -#endif { uintptr_t rcba; /* Root Complex Register Block */ uintptr_t sbase; @@ -306,11 +304,7 @@ struct ich7_spi_regs *ich7_spi; uint16_t hsfs;
-#ifdef __SIMPLE_DEVICE__ pci_devfn_t dev = PCI_DEV(0, 31, 0); -#else - struct device *dev = pcidev_on_root(31, 0); -#endif
if (CONFIG(SOUTHBRIDGE_INTEL_I82801GX)) { ich7_spi = get_spi_bar(dev);