HAOUAS Elyes (ehaouas@noos.fr) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/18387
-gerrit
commit 241bebd88174736d3b3778020c2c16fbac4573ed Author: Elyes HAOUAS ehaouas@noos.fr Date: Thu Feb 16 20:16:57 2017 +0100
[NOTFORMERGE] i945/raminit: Correct C0DRAMW & C1DRAMW for 4 DIMMs
Change-Id: Ib1f999447b37a1524d589552ea2eec640c2a2c7e Signed-off-by: Elyes HAOUAS ehaouas@noos.fr --- src/northbridge/intel/i945/raminit.c | 34 +++++++++++++++++++--------------- 1 file changed, 19 insertions(+), 15 deletions(-)
diff --git a/src/northbridge/intel/i945/raminit.c b/src/northbridge/intel/i945/raminit.c index cc227cc..8159f80 100644 --- a/src/northbridge/intel/i945/raminit.c +++ b/src/northbridge/intel/i945/raminit.c @@ -857,27 +857,31 @@ static void sdram_verify_burst_length(struct sys_info * sysinfo) static void sdram_program_dram_width(struct sys_info * sysinfo) { u16 c0dramw = 0, c1dramw = 0; - int idx; + int i, idx;
if (sysinfo->dual_channel) idx = 2; else idx = 1; + for (i = 0; i < idx*DIMM_SOCKETS; i++) { + if ( !(i%2)){ + switch (sysinfo->dimm[i]) { + case 0: c0dramw |= 0x0000; break; /* x16DS */ + case 1: c0dramw |= 0x0001; break; /* x8DS */ + case 2: c0dramw |= 0x0000; break; /* x16SS */ + case 3: c0dramw |= 0x0005; break; /* x8DDS */ + case 4: c0dramw |= 0x0000; break; /* NC */ + } + }else{ + switch (sysinfo->dimm[i]) { + case 0: c1dramw |= 0x0000; break; /* x16DS */ + case 1: c1dramw |= 0x0010; break; /* x8DS */ + case 2: c1dramw |= 0x0000; break; /* x16SS */ + case 3: c1dramw |= 0x0050; break; /* x8DDS */ + case 4: c1dramw |= 0x0000; break; /* NC */ + } + }
- switch (sysinfo->dimm[0]) { - case 0: c0dramw = 0x0000; break; /* x16DS */ - case 1: c0dramw = 0x0001; break; /* x8DS */ - case 2: c0dramw = 0x0000; break; /* x16SS */ - case 3: c0dramw = 0x0005; break; /* x8DDS */ - case 4: c0dramw = 0x0000; break; /* NC */ - } - - switch (sysinfo->dimm[idx]) { - case 0: c1dramw = 0x0000; break; /* x16DS */ - case 1: c1dramw = 0x0010; break; /* x8DS */ - case 2: c1dramw = 0x0000; break; /* x16SS */ - case 3: c1dramw = 0x0050; break; /* x8DDS */ - case 4: c1dramw = 0x0000; break; /* NC */ }
if ( !sdram_capabilities_dual_channel() ) {