Sindhoor Tilak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/42503 )
Change subject: post_code: replace postcode values with their respective defined constants ......................................................................
Patch Set 11:
(6 comments)
https://review.coreboot.org/c/coreboot/+/42503/10/src/cpu/intel/car/core2/ca... File src/cpu/intel/car/core2/cache_as_ram.S:
https://review.coreboot.org/c/coreboot/+/42503/10/src/cpu/intel/car/core2/ca... PS10, Line 50: post_code(POST_CAR_VARIABLE_MTRR)
Must not load %eax here. Also no point doing this multiple times inside a loop.
Done
https://review.coreboot.org/c/coreboot/+/42503/9/src/cpu/intel/car/non-evict... File src/cpu/intel/car/non-evict/exit_car.S:
https://review.coreboot.org/c/coreboot/+/42503/9/src/cpu/intel/car/non-evict... PS9, Line 15: POST_CAR_CACHE_DISABLE
Ack
Done
https://review.coreboot.org/c/coreboot/+/42503/9/src/cpu/intel/car/non-evict... PS9, Line 28: POST_CAR_CACHE_EVICTION
Ack
Done
https://review.coreboot.org/c/coreboot/+/42503/10/src/cpu/intel/car/p3/cache... File src/cpu/intel/car/p3/cache_as_ram.S:
https://review.coreboot.org/c/coreboot/+/42503/10/src/cpu/intel/car/p3/cache... PS10, Line 37: post_code(POST_CAR_VARIABLE_MTRR)
Must not load %eax here and place outside the loop.
Done
https://review.coreboot.org/c/coreboot/+/42503/10/src/cpu/intel/car/p4-netbu... File src/cpu/intel/car/p4-netburst/cache_as_ram.S:
https://review.coreboot.org/c/coreboot/+/42503/10/src/cpu/intel/car/p4-netbu... PS10, Line 46: post_code(POST_CAR_VARIABLE_MTRR)
Like before
Done
https://review.coreboot.org/c/coreboot/+/42503/10/src/southbridge/intel/comm... File src/southbridge/intel/common/finalize.c:
https://review.coreboot.org/c/coreboot/+/42503/10/src/southbridge/intel/comm... PS10, Line 3: #include <arch/io.h>
I think this was for outb() and no longer needed.
Did you mean post_codes.h? I added console.h for the post_code() call