Julius Werner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/37305 )
Change subject: sc7180: clock: Add support for QUP DFSR configuration ......................................................................
Patch Set 1:
(1 comment)
Starting from here it needs a rebase again to merge.
https://review.coreboot.org/c/coreboot/+/37305/1/src/soc/qualcomm/sc7180/clo... File src/soc/qualcomm/sc7180/clock.c:
https://review.coreboot.org/c/coreboot/+/37305/1/src/soc/qualcomm/sc7180/clo... PS1, Line 249: setbits_le32(&qup_clk->dfsr_clk.cmd_dfsr, We recently changed how this is supposed to be done: you're now just supposed to use clrbits32()/setbits32()/clrsetbits32() instead of the _le32() variants for normal register accesses. Please update all patches still in flight here to follow that new convention.