[coreboot-gerrit] [S] Change in coreboot[master]: soc/intel/elkhartlake: Make SATA speed limit configurable

[Eric Lai (Code Review)]

Eric Lai has submitted this change. ( https://review.coreboot.org/c/coreboot/+/71229 )

Change subject: soc/intel/elkhartlake: Make SATA speed limit configurable
......................................................................

soc/intel/elkhartlake: Make SATA speed limit configurable

In cases where there are limitations on the mainboard it can be
necessary to limit the used SATA speed even though both, the SATA
controller and disk drive support a higher speed rate. The FSP parameter
'SataSpeedLimit' allows to set the speed limit.

This patch provides a chip config so that this FSP parameter can be
set as needed in the devicetree on mainboard level.

Change-Id: I610263b34b0947378d2025211ece4a9ec8fbfef6
Signed-off-by: Werner Zeh 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/71229
Reviewed-by: Paul Menzel 
Tested-by: build bot (Jenkins) 
Reviewed-by: Mario Scheithauer 
Reviewed-by: Arthur Heymans 
---
M src/soc/intel/elkhartlake/chip.h
M src/soc/intel/elkhartlake/fsp_params.c
2 files changed, 32 insertions(+), 0 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Paul Menzel: Looks good to me, but someone else must approve
  Mario Scheithauer: Looks good to me, approved
  Arthur Heymans: Looks good to me, approved

diff --git a/src/soc/intel/elkhartlake/chip.h b/src/soc/intel/elkhartlake/chip.h
index 94a2cdf..d419027 100644
--- a/src/soc/intel/elkhartlake/chip.h
+++ b/src/soc/intel/elkhartlake/chip.h
@@ -103,6 +103,13 @@
    				  FIVR_VOLTAGE_MIN_RETENTION,
 };

+/* SATA speed limit */
+enum sata_speed_limit {
+	SATA_DEFAULT = 0,
+	SATA_GEN1,
+	SATA_GEN2
+};
+
 struct soc_intel_elkhartlake_config {

/* Common struct containing soc config data required by common code */
@@ -181,6 +188,7 @@
    uint8_t SataSalpSupport;
    uint8_t SataPortsEnable[CONFIG_MAX_SATA_PORTS];
    uint8_t SataPortsDevSlp[CONFIG_MAX_SATA_PORTS];
+	enum sata_speed_limit SataSpeed;
    /*
     * Enable(0)/Disable(1) SATA Power Optimizer on PCH side.
     * Default 0. Setting this to 1 disables the SATA Power Optimizer.
diff --git a/src/soc/intel/elkhartlake/fsp_params.c b/src/soc/intel/elkhartlake/fsp_params.c
index c72d4da..1466ee2 100644
--- a/src/soc/intel/elkhartlake/fsp_params.c
+++ b/src/soc/intel/elkhartlake/fsp_params.c
@@ -368,6 +368,7 @@
    	params->SataMode = config->SataMode;
    	params->SataSalpSupport = config->SataSalpSupport;
    	params->SataPwrOptEnable = !(config->SataPwrOptimizeDisable);
+		params->SataSpeedLimit = config->SataSpeed;

for (i = 0; i < CONFIG_MAX_SATA_PORTS; i++) {
    		params->SataPortsEnable[i] = config->SataPortsEnable[i];