Maxim Polyakov has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/35070 )
Change subject: mb/asrock/h110m: disable unused serial buses ......................................................................
mb/asrock/h110m: disable unused serial buses
Disable psi0, i2c0 and i2c1 in the “SerialIoDevMode” register for the following reasons:
1. when the AMI BIOS is used, these pci devices are disabled in lspci.log; 2. there are no pads in the inteltool.log that use the functions of these buses
Change-Id: I01ab10eb3fd41e81a1726805247c2b472d72287c Signed-off-by: Maxim Polyakov max.senia.poliak@gmail.com --- M src/mainboard/asrock/h110m/devicetree.cb 1 file changed, 3 insertions(+), 3 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/70/35070/1
diff --git a/src/mainboard/asrock/h110m/devicetree.cb b/src/mainboard/asrock/h110m/devicetree.cb index 934083a..f87ca45 100644 --- a/src/mainboard/asrock/h110m/devicetree.cb +++ b/src/mainboard/asrock/h110m/devicetree.cb @@ -190,13 +190,13 @@
# PCH UART, SPI, I2C register "SerialIoDevMode" = "{ \ - [PchSerialIoIndexI2C0] = PchSerialIoPci, \ - [PchSerialIoIndexI2C1] = PchSerialIoPci, \ + [PchSerialIoIndexI2C0] = PchSerialIoDisabled, \ + [PchSerialIoIndexI2C1] = PchSerialIoDisabled, \ [PchSerialIoIndexI2C2] = PchSerialIoDisabled, \ [PchSerialIoIndexI2C3] = PchSerialIoDisabled, \ [PchSerialIoIndexI2C4] = PchSerialIoDisabled, \ [PchSerialIoIndexI2C5] = PchSerialIoDisabled, \ - [PchSerialIoIndexSpi0] = PchSerialIoPci, \ + [PchSerialIoIndexSpi0] = PchSerialIoDisabled, \ [PchSerialIoIndexSpi1] = PchSerialIoDisabled, \ [PchSerialIoIndexUart0] = PchSerialIoDisabled, \ [PchSerialIoIndexUart1] = PchSerialIoDisabled, \