[coreboot-gerrit] Change in coreboot[master]: soc/intel/alderlake: Fix processor hang while plug unplug of TBT device

[Tim Wawrzynczak (Code Review)]

Tim Wawrzynczak has submitted this change. ( https://review.coreboot.org/c/coreboot/+/56503 )

Change subject: soc/intel/alderlake: Fix processor hang while plug unplug of TBT device
......................................................................

soc/intel/alderlake: Fix processor hang while plug unplug of TBT device

Processor hang is observed while hot plug unplug of TBT device. BIOS
should execute TBT PCIe RP RTD3 flow based on the value of
TBT_DMA_CFG_VS_CAP_9[30]. It should skip TBT PCIe RP RTD3 flow, if
BIT30 in TBT FW version is not set.

BUG=b:194880254

Change-Id: Ie3577df519f64c6f7270dc5537278af76536774e
Signed-off-by: Sugnan Prabhu S 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/56503
Reviewed-by: Tim Wawrzynczak 
Tested-by: build bot (Jenkins) 
---
M src/soc/intel/alderlake/acpi/tcss.asl
M src/soc/intel/alderlake/acpi/tcss_dma.asl
2 files changed, 10 insertions(+), 7 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Tim Wawrzynczak: Looks good to me, approved

diff --git a/src/soc/intel/alderlake/acpi/tcss.asl b/src/soc/intel/alderlake/acpi/tcss.asl
index d01d872..82cbad63 100644
--- a/src/soc/intel/alderlake/acpi/tcss.asl
+++ b/src/soc/intel/alderlake/acpi/tcss.asl
@@ -555,12 +555,13 @@
    		Printf("TDM0 does not exist.")
    	} Else {
    		If (_SB.PCI0.TDM0.STAT == 1) {
-				If (_SB.PCI0.TDM0.INFR != 1) {
-					Return
-				}
    			/* DMA0 is not in D3Cold now. */
    			_SB.PCI0.TDM0.D3CE()  /* Enable DMA RTD3 */

+				If (_SB.PCI0.TDM0.IF30 != 1) {
+					Return
+				}
+
    			Printf("Push TBT RPs to D3Cold together")
    			If (_SB.PCI0.TRP0.VDID != 0xFFFFFFFF) {
    				/* Put RP0 to D3 cold. */
@@ -613,12 +614,13 @@
    		 Printf("TDM1 does not exist.")
    	} Else {
    		If (_SB.PCI0.TDM1.STAT == 1) {
-				If (_SB.PCI0.TDM1.INFR != 1) {
-					Return
-				}
    			/* DMA1 is not in D3Cold now */
    			_SB.PCI0.TDM1.D3CE()  /* Enable DMA RTD3. */

+				If (_SB.PCI0.TDM1.IF30 != 1) {
+					Return
+				}
+
    			Printf("Push TBT RPs to D3Cold together")
    			If (_SB.PCI0.TRP2.VDID != 0xFFFFFFFF) {
    				/* Put RP2 to D3 cold. */
diff --git a/src/soc/intel/alderlake/acpi/tcss_dma.asl b/src/soc/intel/alderlake/acpi/tcss_dma.asl
index d00f794..0b5e03f 100644
--- a/src/soc/intel/alderlake/acpi/tcss_dma.asl
+++ b/src/soc/intel/alderlake/acpi/tcss_dma.asl
@@ -11,7 +11,8 @@
    , 6,
    PMES, 1,        /* 15, PME_STATUS */
    Offset(0xC8),   /* 0xC8, TBT NVM FW Revision */
-	,     31,
+	,     30,
+	IF30,  1,	/* ITBT FW Version Bit30 */
    INFR,  1,       /* TBT NVM FW Ready */
    Offset(0xEC),   /* 0xEC, TBT TO PCIE Register */
    TB2P, 32,       /* TBT to PCIe */