[coreboot-gerrit] Change in coreboot[master]: superio/aspeed/ast2400: Fix Register Offset

[Christian Walter (Code Review)]

Christian Walter has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/38565 )

Change subject: superio/aspeed/ast2400: Fix Register Offset
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superio/aspeed/ast2400: Fix Register Offset

According to the specification the register offset must be 0x71 instead
of 0x70.

Change-Id: Icf69ffc701a42a31a4545ce53c13e2c2554863e1
Signed-off-by: Christian Walter 
---
M src/superio/aspeed/ast2400/superio.c
1 file changed, 1 insertion(+), 1 deletion(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/65/38565/1

diff --git a/src/superio/aspeed/ast2400/superio.c b/src/superio/aspeed/ast2400/superio.c
index 37a7c9d..6f2cbcd 100644
--- a/src/superio/aspeed/ast2400/superio.c
+++ b/src/superio/aspeed/ast2400/superio.c
@@ -35,7 +35,7 @@
    	pnp_enter_conf_mode(dev);
    	pnp_set_logical_device(dev);
    	/* In ESPI mode must write 0 to IRQ level on every LDN */
-		pnp_write_config(dev, 0x70, 0);
+		pnp_write_config(dev, 0x71, 0);
    	pnp_exit_conf_mode(dev);
    }