Nick Vaccaro has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39356 )
Change subject: mb/google/volteer: Enabling Audio DSP UPD configs ......................................................................
Patch Set 7:
(1 comment)
https://review.coreboot.org/c/coreboot/+/39356/2/src/mainboard/google/voltee... File src/mainboard/google/volteer/variants/baseboard/devicetree.cb:
https://review.coreboot.org/c/coreboot/+/39356/2/src/mainboard/google/voltee... PS2, Line 121: # iDisp-Link T-Mode 0: 2T, 2: 4T, 3: 8T, 4: 16T : register "PchHdaIDispLinkTmode" = "2" : # iDisp-Link Freq 4: 96MHz, 3: 48MHz. : register "PchHdaIDispLinkFrequency" = "4" : # Not disconnected/enumerable : register "PchHdaIDispCodecDisconnect" = "0"
Thanks, will do.
I spoke to Curtis and asked him to take a look, he said "Looked at the CL, I don't have enough knowledge around iDisp and coreboot to comment, I recommend talking to Sathyanarayana Nujella at Intel". I added Sathyanarayana as a reviewer.