Kyösti Mälkki (kyosti.malkki@gmail.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/17666
-gerrit
commit 428286f98ca79ade2fca688a48d125482991bcfe Author: Kyösti Mälkki kyosti.malkki@gmail.com Date: Thu Dec 1 07:03:51 2016 +0200
prog_loaders: Enable stage cache without RELOCATABLE_RAMSTAGE
On intel/gm45 S3 resume path, improves entry to ramstage by 40ms.
Change-Id: Ib6729b37c97939a39076f75bbf5d9f0abcb1201d Signed-off-by: Kyösti Mälkki kyosti.malkki@gmail.com --- src/lib/Makefile.inc | 6 ++++-- src/lib/cbmem_stage_cache.c | 4 ++++ 2 files changed, 8 insertions(+), 2 deletions(-)
diff --git a/src/lib/Makefile.inc b/src/lib/Makefile.inc index 2d5aa57..cd7b491 100644 --- a/src/lib/Makefile.inc +++ b/src/lib/Makefile.inc @@ -169,13 +169,15 @@ verstage-$(CONFIG_REG_SCRIPT) += reg_script.c romstage-$(CONFIG_REG_SCRIPT) += reg_script.c ramstage-$(CONFIG_REG_SCRIPT) += reg_script.c
+ifeq ($(CONFIG_HAVE_ACPI_RESUME),y) ifeq ($(CONFIG_CACHE_RELOCATED_RAMSTAGE_OUTSIDE_CBMEM),y) ramstage-y += ext_stage_cache.c romstage-y += ext_stage_cache.c postcar-y += ext_stage_cache.c else -ramstage-$(CONFIG_RELOCATABLE_RAMSTAGE) += cbmem_stage_cache.c -romstage-$(CONFIG_RELOCATABLE_RAMSTAGE) += cbmem_stage_cache.c +ramstage-$(CONFIG_EARLY_CBMEM_INIT) += cbmem_stage_cache.c +romstage-$(CONFIG_EARLY_CBMEM_INIT) += cbmem_stage_cache.c +endif endif
diff --git a/src/lib/cbmem_stage_cache.c b/src/lib/cbmem_stage_cache.c index 3fc99db..547c377 100644 --- a/src/lib/cbmem_stage_cache.c +++ b/src/lib/cbmem_stage_cache.c @@ -60,6 +60,10 @@ void stage_cache_load_stage(int stage_id, struct prog *stage) size = cbmem_entry_size(e); load_addr = (void *)(uintptr_t)meta->load_addr;
+ /* Ramstage fills low memory, need to backup OS first.*/ + if (!IS_ENABLED(CONFIG_RELOCATABLE_RAMSTAGE)) + backup_ramstage_section(meta->load_addr, size); + memcpy(load_addr, c, size);
prog_set_area(stage, load_addr, size);