[coreboot-gerrit] Change in coreboot[master]: mrc_cache: Move force memory retraining code into mrc_cache

[Shelley Chen (Code Review)]

Hello build bot (Jenkins), Furquan Shaikh, Julius Werner, Andrey Petrov, Patrick Rudolph,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/46855

to look at the new patch set (#3).

Change subject: mrc_cache: Move force memory retraining code into mrc_cache
......................................................................

mrc_cache: Move force memory retraining code into mrc_cache

Currently forced memory retraining is handled in fsp 2.0.  Moving the
code into mrc_cache so more platforms can utilize it.  In the case of
!HAS_RECOVERY_MRC_CACHE, have linked the use of the mrc_cache to the
configs VBOOT_STARTS_IN_BOOTBLOCK and VBOOT_STARTS_IN_ROMSTAGE.  If
VBOOT_STARTS IN_BOOTBLOCK, this means that memory training will occur
after verified boot, meaning that mrc_cache will be filled with data
from executing RW code, so in this case, we never want to use the
training data in the mrc_cache If VBOOT_STARTS_IN_ROMSTAGE, this means
that memory training happens before verfied boot, meaning that the
mrc_cache data is generated by RO code, so it is safe to use for a
recovery boot.

BUG=b:150502246
BRANCH=None
TEST=1. run dut-control power_state:rec_force_mrc twice on lazor
        ensure that memory training happens both times
        run dut-control power_state:rec twice on lazor
        ensure that memory training happens only first time
     2. remove HAS_RECOVERY_MRC_CACHE from lazor Kconfig
        boot twice to ensure memory training has occurred
    dut-control power_state:rec and make sure memory training
    doesn't occur.
     3. Add MRC_ALWAYS_RETRAIN_IN_RECOVERY to lazor Kconfig
        boot twice to ensure memory training has occurred
    dut-control power_state:rec and make sure memory training
    occurs.
    dut-control power_state:rec a few more times to make sure
    memory training always occurs on a recovery boot.

Change-Id: I3875a7b4a4ba3c1aa8a3c1507b3993036a7155fc
Signed-off-by: Shelley Chen 
---
M src/drivers/intel/fsp1_1/romstage.c
M src/drivers/intel/fsp2_0/Kconfig
M src/drivers/intel/fsp2_0/memory_init.c
M src/drivers/mrc_cache/Kconfig
M src/drivers/mrc_cache/mrc_cache.c
M src/northbridge/intel/haswell/raminit.c
M src/northbridge/intel/sandybridge/raminit_mrc.c
M src/soc/intel/broadwell/romstage/raminit.c
8 files changed, 80 insertions(+), 71 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/55/46855/3