Arthur Heymans has submitted this change. ( https://review.coreboot.org/c/coreboot/+/55008 )
Change subject: cpu/x86/fpu_enable.inc: Remove file used by romcc ......................................................................
cpu/x86/fpu_enable.inc: Remove file used by romcc
Change-Id: I530bb217bb9a944990232dcf4e08f160b5267512 Signed-off-by: Arthur Heymans arthur@aheymans.xyz Reviewed-on: https://review.coreboot.org/c/coreboot/+/55008 Reviewed-by: Paul Menzel paulepanter@mailbox.org Reviewed-by: Kyösti Mälkki kyosti.malkki@gmail.com Tested-by: build bot (Jenkins) no-reply@coreboot.org --- D src/cpu/x86/fpu_enable.inc 1 file changed, 0 insertions(+), 22 deletions(-)
Approvals: build bot (Jenkins): Verified Kyösti Mälkki: Looks good to me, approved Paul Menzel: Looks good to me, but someone else must approve
diff --git a/src/cpu/x86/fpu_enable.inc b/src/cpu/x86/fpu_enable.inc deleted file mode 100644 index 28d2063..0000000 --- a/src/cpu/x86/fpu_enable.inc +++ /dev/null @@ -1,22 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ - -__fpu_start: - /* Preserve BIST. */ - movl %eax, %ebp - - /* - * Clear the CR0[2] bit (the "Emulation" flag, EM). - * - * This indicates that the processor has an (internal or external) - * x87 FPU, i.e. floating point operations will be executed by the - * hardware (and not emulated in software). - * - * Additionally, if this bit is not cleared, MMX/SSE instructions won't - * work, i.e., they will trigger an invalid opcode exception (#UD). - */ - movl %cr0, %eax - andl $~(1 << 2), %eax - movl %eax, %cr0 - - /* Restore BIST. */ - movl %ebp, %eax
1 is the latest approved patch-set. No files were changed between the latest approved patch-set and the submitted one.