Attention is currently required from: Felix Held, Fred Reitberger, Jason Glenesk, Matt DeVillier.
Nico Huber has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/79955?usp=email )
Change subject: tree: More use accessor functions for struct region fields ......................................................................
tree: More use accessor functions for struct region fields
Always use the high-level API region_offset() and region_sz() functions. This excludes the internal `region.c` code as well as unit tests. FIT payload support was also skipped, as it seems it never tried to use the API and would need a bigger overhaul.
Change-Id: I18f1e37a06783aecde9024c15876b67bfeed70ee Signed-off-by: Nico Huber nico.h@gmx.de --- M src/soc/amd/common/block/spi/fch_spi_ctrl.c M src/soc/amd/common/psp_verstage/psp_verstage.c M src/soc/qualcomm/common/qclib.c M src/soc/qualcomm/sc7180/soc.c M src/soc/qualcomm/sc7280/soc.c 5 files changed, 16 insertions(+), 12 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/55/79955/1
diff --git a/src/soc/amd/common/block/spi/fch_spi_ctrl.c b/src/soc/amd/common/block/spi/fch_spi_ctrl.c index b3d7c69..ec3eef6 100644 --- a/src/soc/amd/common/block/spi/fch_spi_ctrl.c +++ b/src/soc/amd/common/block/spi/fch_spi_ctrl.c @@ -221,8 +221,8 @@ size_t addr, len, gran_value, total_ranges, range; bool granularity_64k = true; /* assume 64k granularity */
- addr = region->offset; - len = region->size; + addr = region_offset(region); + len = region_sz(region);
reg32 = pci_read_config32(SOC_LPC_DEV, ROM_ADDRESS_RANGE2_START); rom_base = WORD_TO_DWORD_UPPER(reg32); diff --git a/src/soc/amd/common/psp_verstage/psp_verstage.c b/src/soc/amd/common/psp_verstage/psp_verstage.c index 7d9ef35..b49acae 100644 --- a/src/soc/amd/common/psp_verstage/psp_verstage.c +++ b/src/soc/amd/common/psp_verstage/psp_verstage.c @@ -85,13 +85,17 @@
if (vboot_is_firmware_slot_a(ctx)) { fname = "apu/amdfw_a"; - if (!fmap_locate_area("FW_MAIN_A", &fw_slot)) - map_base = rdev_mmap(boot_device_ro(), fw_slot.offset, fw_slot.size); + if (!fmap_locate_area("FW_MAIN_A", &fw_slot)) { + map_base = rdev_mmap(boot_device_ro(), + region_offset(&fw_slot), region_sz(&fw_slot)); + }
} else { fname = "apu/amdfw_b"; - if (!fmap_locate_area("FW_MAIN_B", &fw_slot)) - map_base = rdev_mmap(boot_device_ro(), fw_slot.offset, fw_slot.size); + if (!fmap_locate_area("FW_MAIN_B", &fw_slot)) { + map_base = rdev_mmap(boot_device_ro(), + region_offset(&fw_slot), region_sz(&fw_slot)); + } }
if (!map_base) { @@ -118,7 +122,7 @@ psp_dir_addr = ef_table->new_psp_directory; bios_dir_addr = get_bios_dir_addr(ef_table); psp_dir_in_spi = (uint32_t *)((psp_dir_addr & SPI_ADDR_MASK) + - (uint32_t)map_base - fw_slot.offset); + (uint32_t)map_base - region_offset(&fw_slot)); if (*psp_dir_in_spi != PSP_COOKIE) { printk(BIOS_ERR, "PSP Directory address is not correct.\n"); cbfs_unmap(amdfw_location); @@ -129,7 +133,7 @@
if (bios_dir_addr) { bios_dir_in_spi = (uint32_t *)((bios_dir_addr & SPI_ADDR_MASK) + - (uint32_t)map_base - fw_slot.offset); + (uint32_t)map_base - region_offset(&fw_slot)); if (*bios_dir_in_spi != BHD_COOKIE) { printk(BIOS_ERR, "BIOS Directory address is not correct.\n"); cbfs_unmap(amdfw_location); diff --git a/src/soc/qualcomm/common/qclib.c b/src/soc/qualcomm/common/qclib.c index cfe3e2a..56fd3bf 100644 --- a/src/soc/qualcomm/common/qclib.c +++ b/src/soc/qualcomm/common/qclib.c @@ -106,8 +106,8 @@ ddr_region->size = ddr_size * MiB;
/* Use DDR info to configure MMU */ - qc_mmu_dram_config_post_dram_init((void *)ddr_region->offset, - (size_t)ddr_region->size); + qc_mmu_dram_config_post_dram_init( + (void *)(uintptr_t)region_offset(ddr_region), region_sz(ddr_region)); }
static void write_qclib_log_to_cbmemc(struct qclib_cb_if_table_entry *te) diff --git a/src/soc/qualcomm/sc7180/soc.c b/src/soc/qualcomm/sc7180/soc.c index d8df98a..cef7e8f 100644 --- a/src/soc/qualcomm/sc7180/soc.c +++ b/src/soc/qualcomm/sc7180/soc.c @@ -12,7 +12,7 @@ void *start = NULL; void *end = NULL;
- ram_range(dev, 0, (uintptr_t)ddr_region->offset, ddr_region->size); + ram_range(dev, 0, (uintptr_t)region_offset(ddr_region), region_sz(ddr_region)); reserved_ram_range(dev, 1, (uintptr_t)_dram_aop, REGION_SIZE(dram_aop)); reserved_ram_range(dev, 2, (uintptr_t)_dram_soc, REGION_SIZE(dram_soc)); if (soc_modem_carve_out(&start, &end)) diff --git a/src/soc/qualcomm/sc7280/soc.c b/src/soc/qualcomm/sc7280/soc.c index e6dbf21..a972d6e 100644 --- a/src/soc/qualcomm/sc7280/soc.c +++ b/src/soc/qualcomm/sc7280/soc.c @@ -19,7 +19,7 @@ void *start = NULL; void *end = NULL;
- ram_range(dev, 0, (uintptr_t)ddr_region->offset, ddr_region->size); + ram_range(dev, 0, (uintptr_t)region_offest(ddr_region), region_sz(ddr_region)); reserved_ram_range(dev, 1, (uintptr_t)_dram_soc, REGION_SIZE(dram_soc)); reserved_ram_range(dev, 2, (uintptr_t)_dram_wlan, REGION_SIZE(dram_wlan)); reserved_ram_range(dev, 3, (uintptr_t)_dram_wpss, REGION_SIZE(dram_wpss));