[coreboot-gerrit] [S] Change in coreboot[master]: soc/intel: Do CSE sync in romstage, unless ramstage chooses otherwise

[build bot (Jenkins) (Code Review)]

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74831 )

Change subject: soc/intel: Do CSE sync in romstage, unless ramstage chooses otherwise
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Patch Set 1:

(1 comment)

Commit Message:

Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-175159):
https://review.coreboot.org/c/coreboot/+/74831/comment/74d95964_36aff09f 
PS1, Line 19: Signed-off-by: Subrata Banik 
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