John Zhao has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39785 )
Change subject: soc/intel/tigerlake: Configure TCSS power management ......................................................................
Patch Set 14:
(3 comments)
Patch Set 14:
This change just got a lot bigger, was it squashed with another commit?
Correct. It has PM support for TBT pcie root ports and dma along with xchi. xdci is not yet included.
https://review.coreboot.org/c/coreboot/+/39785/13/src/soc/intel/tigerlake/ac... File src/soc/intel/tigerlake/acpi/tcss.asl:
https://review.coreboot.org/c/coreboot/+/39785/13/src/soc/intel/tigerlake/ac... PS13, Line 4: * : * This program is free software; you can redistribute it and/or modify : * it under the terms of the GNU General Public License as published by : * the Free Software Foundation; version 2 of the License. : * : * This program is distributed in the hope that it will be useful, : * but WITHOUT ANY WARRANTY; without even the implied warranty of : * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the : * GNU General Public License for more details.
Sorry I should have been clearer, this whole block can be replaced by: SPDX-License-Identifier: GPL- […]
Ack
https://review.coreboot.org/c/coreboot/+/39785/14/src/soc/intel/tigerlake/ac... File src/soc/intel/tigerlake/acpi/tcss_dma.asl:
https://review.coreboot.org/c/coreboot/+/39785/14/src/soc/intel/tigerlake/ac... PS14, Line 123: * 2 - wait in progress
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Ack
https://review.coreboot.org/c/coreboot/+/39785/14/src/soc/intel/tigerlake/ac... PS14, Line 203: Method (_DSD, 0)
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Ack