[coreboot-gerrit] New patch to review for coreboot: 59c85c9 lenovo/x60/i915.c: Rename variable `PGETBL_save` to `pgetbl_ctl`

[Paul Menzel]

Paul Menzel ([e-mail]) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/5933

-gerrit

commit 59c85c917a0fc353fe40dd97571b97dcb4813761
Author: Paul Menzel 
Date:   Thu Jun 5 09:41:06 2014 +0200

lenovo/x60/i915.c: Rename variable `PGETBL_save` to `pgetbl_ctl`

The name was taken from the function `intel_gtt_init()` in
    `drivers/char/agp/intel-gtt.c` in the Linux kernel. It is used
    differently here `gtt_setup()`, so rename it.

Change-Id: I16896fc9383a5e40992a24fa096fd373db66e436
    Signed-off-by: Paul Menzel 
---
 src/mainboard/lenovo/x60/i915.c | 12 ++++++------
 1 file changed, 6 insertions(+), 6 deletions(-)

diff --git a/src/mainboard/lenovo/x60/i915.c b/src/mainboard/lenovo/x60/i915.c
index 5ebd066..8399ae7 100644
--- a/src/mainboard/lenovo/x60/i915.c
+++ b/src/mainboard/lenovo/x60/i915.c
@@ -132,17 +132,17 @@ setgtt(int start, int end, unsigned long base, int inc)
 int gtt_setup(unsigned int mmiobase);
 int gtt_setup(unsigned int mmiobase)
 {
-	unsigned long PGETBL_save;
+	unsigned long pgetbl_ctl;

-	PGETBL_save = read32(mmiobase + PGETBL_CTL) & ~PGETBL_ENABLED;
-	PGETBL_save |= PGETBL_ENABLED;
+	pgetbl_ctl = read32(mmiobase + PGETBL_CTL) & ~PGETBL_ENABLED;
+	pgetbl_ctl |= PGETBL_ENABLED;

-	PGETBL_save |= pci_read_config32(dev_find_slot(0, PCI_DEVFN(2,0)), BSM) & 0xfffff000;
-	PGETBL_save |= 2; /* set GTT to 256kb */
+	pgetbl_ctl |= pci_read_config32(dev_find_slot(0, PCI_DEVFN(2,0)), BSM) & 0xfffff000;
+	pgetbl_ctl |= 2; /* set GTT to 256kb */

write32(mmiobase + GFX_FLSH_CNTL, 0);

-	write32(mmiobase + PGETBL_CTL, PGETBL_save);
+	write32(mmiobase + PGETBL_CTL, pgetbl_ctl);

/* verify */
    if (read32(mmiobase + PGETBL_CTL) & PGETBL_ENABLED) {