Paul Menzel (paulepanter@users.sourceforge.net) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/5930
-gerrit
commit 0837d50c9292dcdbc5045f1edd714683a2f1a779 Author: Paul Menzel paulepanter@users.sourceforge.net Date: Thu Jun 5 09:04:40 2014 +0200
lenovo/x60/i915.c: Remove `PGETLB_CTL` define with typo in name
Currently there are the two defines `PGETBL_CTL` and `PGETLB_CTL`. Use the one using TBL as the abbreviation for *table* and which is the name used in the Intel 965 datasheet.
[1] https://01.org/linuxgraphics/sites/default/files/documentation/965_g35_vol_1... Intel ® 965 Express Chipset Family and Intel ® G35 Express Chipset Graphics Controller Programmer’s Reference Manual Volume 1: Graphics Core Revision 1.0a
Change-Id: I459c2576d91e80accaae313b34875cc7b8c446ad Signed-off-by: Paul Menzel paulepanter@users.sourceforge.net --- src/mainboard/lenovo/x60/i915.c | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-)
diff --git a/src/mainboard/lenovo/x60/i915.c b/src/mainboard/lenovo/x60/i915.c index 8fbd2a1..6e67bff 100644 --- a/src/mainboard/lenovo/x60/i915.c +++ b/src/mainboard/lenovo/x60/i915.c @@ -48,8 +48,6 @@ enum { vmsg = 1, vio = 2, vspin = 4, };
-#define PGETLB_CTL 0x2020 - static int verbose = 0;
static unsigned int *mmio; @@ -353,8 +351,8 @@ int i915lightup(unsigned int pphysbase, unsigned int piobase,
setgtt(0, 800 , physbase, 4096);
- temp = READ32(PGETLB_CTL); - printk(BIOS_INFO, "GTT PGETLB_CTL register: 0x%lx\n", temp); + temp = READ32(PGETBL_CTL); + printk(BIOS_INFO, "GTT PGETBL_CTL register: 0x%lx\n", temp);
if (temp & 1) printk(BIOS_INFO, "GTT Enabled\n");