Patrick Rudolph has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/40946 )
Change subject: nb/intel/sandybridge/raminit: Add ECC debug code ......................................................................
Patch Set 3:
(4 comments)
https://review.coreboot.org/c/coreboot/+/40946/1//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/40946/1//COMMIT_MSG@12 PS1, Line 12: * ECC scrubbing must happen after dram_dimm_set_mapping()
I was asking because it's not covered by the commit summary.
Updated commit message.
https://review.coreboot.org/c/coreboot/+/40946/1//COMMIT_MSG@13 PS1, Line 13: * Move method out of try_init_dram_ddr3()
Yes. By coincidence this also satisfies the 2nd and 3rd point.
Done
https://review.coreboot.org/c/coreboot/+/40946/2/src/northbridge/intel/sandy... File src/northbridge/intel/sandybridge/raminit.c:
https://review.coreboot.org/c/coreboot/+/40946/2/src/northbridge/intel/sandy... PS2, Line 389: 16
`bit 16` […]
Removed
https://review.coreboot.org/c/coreboot/+/40946/2/src/northbridge/intel/sandy... PS2, Line 390: * Rowbits start at bit 20 in physical memory map.
Most probably depends on the configuration, 1/2/4 ranks 1/2 channels.
Removed