[coreboot-gerrit] Change in coreboot[master]: soc/intel/tigerlake: Update SerialIoUart settings for Tiger Lake

[Srinidhi N Kaushik (Code Review)]

Srinidhi N Kaushik has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/39169 )

Change subject: soc/intel/tigerlake: Update SerialIoUart settings for Tiger Lake
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soc/intel/tigerlake: Update SerialIoUart settings for Tiger Lake

update SerialIoUartAutoFlow settings for Tiger Lake platform.

Signed-off-by: Srinidhi N Kaushik 
Change-Id: I5ff2c63857a868ca4ed72c6d93bf518e085b8879
---
M src/soc/intel/tigerlake/fsp_params_tgl.c
1 file changed, 3 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/69/39169/1

diff --git a/src/soc/intel/tigerlake/fsp_params_tgl.c b/src/soc/intel/tigerlake/fsp_params_tgl.c
index d22cde0..b24156c 100644
--- a/src/soc/intel/tigerlake/fsp_params_tgl.c
+++ b/src/soc/intel/tigerlake/fsp_params_tgl.c
@@ -13,6 +13,7 @@
  * GNU General Public License for more details.
  */

+#include <assert.h>
 #include <console/console.h>
 #include <device/device.h>
 #include <device/pci.h>
@@ -120,6 +121,8 @@

/* PCH UART selection for FSP Debug */
    params->SerialIoDebugUartNumber = CONFIG_UART_FOR_CONSOLE;
+	ASSERT(CONFIG_UART_FOR_CONSOLE < ARRAY_SIZE(params->SerialIoUartAutoFlow));
+	params->SerialIoUartAutoFlow[CONFIG_UART_FOR_CONSOLE] = 0;

/* SATA */
    dev = pcidev_on_root(PCH_DEV_SLOT_SATA, 0);